Course detail

Digital Signal Processors

FEKT-NSPRAcad. year: 2009/2010

Definition of digital signal processor, its differences from the other microprocessors. Generations of digital signal processors and their typical features, trends of development. Basic digital signal processor architectures. Freescale fixed-point digital signal processors. Processor core and the sum of peripherals. Storage mapping. Development tools. Instruction file and the way it is applied. Connection with programming in the C-language. Canonic and non-canonic structures for implementing type IIR and FIR digital filters on digital signal processor. Type LMS algorithm and its implementation. Structure of FFT algorithm and its types. Floating-point digital signal processors and their distinguishing features. IEEE-754 Standard, fixed- and floating-point number formats. Real-time processing. VLIW architecture. Intrinsic functions, pragma directives.

Language of instruction

English

Number of ECTS credits

6

Mode of study

Not applicable.

Guarantor

doc. Ing. Petr Sysel, Ph.D.

Department

Department of Telecommunications (UTKO)

Learning outcomes of the course unit

The student will be able to design and adapt algorithms of digital signal processing for implementation on digital signal processor. He will be familiar with basic architectures of digital signal processors, their properties, and their employment in practical applications.

Prerequisites

The subject knowledge on the digital signal processing and the microprocessor technology is requested.

Co-requisites

Not applicable.

Planned learning activities and teaching methods

Teaching methods depend on the type of course unit as specified in the article 7 of BUT Rules for Studies and Examinations.

Assesment methods and criteria linked to learning outcomes

Solution of the given project 15 points
Test 7 points
Check exercises 8 points
Written examination 70 points

Course curriculum

1. Generations of digital signal processors, common properties of digital signal processors, von Neumann's architecture, Harvard architecture, parallel processing.
2. Fixed-point and floating-point representations and arithmetic, properties of fixed-point digital signal processors.
3. Quantization effects on implementation of digital filters.
4. FIR and IIR digital filters implementation in digital signal processors.
5. Implementation of fast Fourier transform.
6. Architecture of digital signal processors by Freescale, data arithmetic logic unit.
7. Address generation unit, modulo addressing mode, bit-reverse addrressing mode.
8. Program Controller, instruction pipeline, hardware cycles.
9. On-chip peripherials, DMA controller, interrupt controller.
10. External buses, external memory interface.
11. Program structure and writing in assembler.
12. Program structure and writing in C language, intrinsic functions, pragma directives, integrated development environment.
13. Simulation and emulation hardware.

Work placements

Not applicable.

Aims

The aim of the course is to introduce students to the architecture and basic properties of fixed- and floating-point digital signal processors, to describe the method of assembler programming, and to outline the conection with higher programming languages. Also covered is the implementation of algorithms of linear and adaptive digital filtering.

Specification of controlled education, way of implementation and compensation for absences

lectures are not duly
computer exercise are duly
self-dependent project is duly

Recommended optional programme components

Not applicable.

Prerequisites and corequisites

Not applicable.

Basic literature

SMÉKAL, Z., VÍCH, R.: Signal Processing on Digital Signal Processors (Zpracování signálů se signálovými procesory). Radix spol. s.r.o, Praha 1998. ISBN 80-86031-18-7 (In Czech) (CS)
HEATH, S.:Multimedia & Communications Technology,Focal Press, Oxford, 1996, ISBN 0-240-51460-2 (EN)
Smékal, Z., Sysel, P. Signálové procesory. 1. vydání. Praha: Sdělovací technika, 2006. 283 s. ISBN 80-86645-08-8 (CS)

Recommended reading

Not applicable.

Classification of course in study plans

  • Programme EEKR-MN Master's

    branch MN-SVE , 1. year of study, winter semester, optional interdisciplinary
    branch MN-BEI , 2. year of study, winter semester, optional interdisciplinary
    branch MN-TIT , 2. year of study, winter semester, optional specialized
    branch MN-EST , 2. year of study, winter semester, optional specialized

Type of course unit

 

Lecture

39 hours, optionally

Teacher / Lecturer

doc. Ing. Petr Sysel, Ph.D.

Syllabus

Definition of digital signal processor, features that distinguish it from the other microprocessors. Generations of digital signal processors , their outstanding features, trends of development. Examples of the design and implementation of type FIR digital filter.
Basic architectures of digital signal processors: von Neuman and Harvard architectures, type LIW and VLIW architectures, parallel systems.
Motorola fixed-point digital signal processors. Processor core and the sum of peripherals. Storage mapping. Development tools.
Instruction file and the way it is applied. Basic types of operations, pipelinng, macro-commands and subprograms. Connection with programming in the C-language.
Integer and fraction formats expressed in the ALU unit and in the memory. Saturation arithmetic, rounding. Addressing unit modes, modulo and reverse-bit addressing.
Peripherals of digital signal processor, co-processors, direct access to memory, structure of control unit, interrupt, type DO cycle, stack, on-chip emulation, JTAG.
Canonic and non-canonic structures for the implementation of type IIR and FIR filters on digital signal processor. Description via signal flow graphs, Mason's rule.
Introduction of initial conditions, connection with implementation. Effect of initial conditions on total response.
Adaptive filtering on digital signal processor. Type LMS algorithm and its implementation. Example of application.
Structure of FFT algorithm and its types. Adapting the FFT algorithm for implementation on digital signal processor
Real-time spectral analysis with FFT on digital signal processor. Power spectral desnity and its calculation.
Floating-point digital signal processors and their distinctive features. IEEE-754 Standard, formats of fixed- and floating-point numbers. Subdividing the ALU unit into several parts. Examples of application.
Digital music studio with digital signal processors. Type HDR recording system.Digital musical effects and their implementation in digital signal processor. Plug-In modules. Real-time processing.

Laboratory exercise

26 hours, compulsory

Teacher / Lecturer

doc. Ing. Petr Sysel, Ph.D.

Syllabus

DSPlus integrated development environment for DSP56002 and DSP56307, basic assembler directives
Fixed-point arithmetic, examples of saturation, rounding, scaling
Example of realization of a third-order polynomial
Indirect addressing, mode modulo. Realization of type FIR digital filter in the second canonic form
Test No 1
Program control instructions. DO cycle. Interrupt routine.
Implementation of cascade and parallel realization of type IIR digital filter.
Reserved-bit addressing. Implementation of the FFT algorithm.
Test No 2.
On-chip peripherals. Serial interface. Communication between DSP and A/D and D/A converters.
DSP96002 digital signal processor.
Test No 3.