Project detail

Návrh a vývoj nových převodníků AD se spínanými kapacitory

Duration: 27.03.2003 — 31.12.2004

Funding resources

Ministerstvo školství, mládeže a tělovýchovy ČR - Fond rozvoje vysokých škol (FRVŠ)

- whole funder (2003-03-27 - not assigned)

Mark

IS1612

Default language

Czech

People responsible

Háze Jiří, doc. Ing., Ph.D. - principal person responsible

Units

Department of Microelectronics
- (2003-03-27 - not assigned)

Results

HÁZE, J.; VRBA, R. Behavioural Modelling of the Fully Differential Switched Capacitor Position-Sense Interface for ADC. In Proceedings of 11th International Conference Electronic Devices and Systems EDS 2004. Brno: Czech Republic, 2004. p. 174 ( p.)ISBN: 80-214-2701-9.
Detail

HÁZE, J.; VRBA, R.; SKOČDOPOLE, M.; FUJCIK, L. A 12-bit, Low Power Switched-Capacitor Pipelined ADC, A Case Study. In Proceedings of 11th International Conference Electronic Devices and Systems EDS 2004. Brno: Czech Republic, 2004. p. 169 ( p.)ISBN: 80-214-2701-9.
Detail

HÁZE, J.; VRBA, R.; SKOČDOPOLE, M.; FUJCIK, L. SWITCHED - CAPACITOR ADC WITH LOW POWER CONSUMPTION - BEHAVIOURAL MODELLING. In Socrates Workshop 2004. Intensive Training Programme in Electronic. Crete, Greece: 2004. p. 162 ( p.)ISBN: 80-214-2819-8.
Detail

HÁZE, J.; VRBA, R.; SKOČDOPOLE, M.; FUJCIK, L. Low Power SC Pipelined ADC Using Op-Amp Sharing Approach. In Proceedings of the WSEAS Conferences, Rio de Janeiro, Brasil 2004. Rio de Janeiro: WSEAS, 2004. p. 214 ( p.)ISBN: 960-8457-03-3.
Detail

HÁZE, J.; VRBA, R. Error Correction and Compensation in Capacitive Sensor Systems. In Proceedings of the WSEAS Conferences, Rio de Janeiro, Brasil 2004. Rio de Janeiro: WSEAS, 2004. p. 196 ( p.)ISBN: 960-8457-03-3.
Detail

SKOČDOPOLE, M., VRBA, R., HÁZE, J., FUJCIK, L. RSD Algorithm Implementation to Semiflash ADC. WSEAS Transactions on Circuits, 2004, vol. 2004, no. 9, p. 1971 ( p.)ISSN: 1109-2734.
Detail

SKOČDOPOLE, M., VRBA, R., FUJCIK, L., HÁZE, J. Switched-current RSD analog-to-digital converter. In Socrates Workshop 2004. Intensive Training Programme in Electronic System Design. Proceedings. Crete, Greece: Technological Institute of Crete, Greece, 2004. p. 67 ( p.)ISBN: 80-214-2819-8.
Detail

SKOČDOPOLE, M., VRBA, R., FUJCIK, L., HÁZE, J. RSD Analog-to-Digital Converter with 2,5-Bit Subconverter. In 11th Electronic devices and systems conference 2004 - proceedings. Brno: Ing. Zdeněk Novotný, 2004. p. 203 ( p.)ISBN: 80-214-2701-9.
Detail

HÁZE, J.; VRBA, R. ADC Position-Sense Interface. In Proceedings of 11th Annual IEEE International Conference and Workshop on the Engineering of Computer Based Systems ECBS 2004. Brno: IEEE Computer Society, 2004. p. 429 ( p.)ISBN: 0-7695-2125-8.
Detail

HÁZE, J.; VRBA, R. Error Correction and Compensation in Capacitive Sensor Systems. WSEAS Transactions on Circuits, 2004, vol. 2004, no. 1, p. 1939 ( p.)ISSN: 1109-2734.
Detail

HÁZE, J.; VRBA, R.; SKOČDOPOLE, M.; FUJCIK, L. Low Power SC Pipelined ADC Using Op-Amp Sharing Approach. WSEAS Transactions on Circuits, 2004, vol. 2004, no. 9, p. 1959 ( p.)ISSN: 1109-2734.
Detail

SKOČDOPOLE, M.; VRBA, R.; HÁZE, J.; FUJCIK, L. RSD Algorithm Implementation to Semiflash ADC. In Proceedings of the WSEAS Conferences, Rio de Janeiro, Brasil 2004. Rio de Janeiro: WSEAS, 2004. p. 205 ( p.)ISBN: 960-8457-03-3.
Detail