Hlavním cílem projektu je systematicky rozvíjet koncept "návrhu pro bezpečnost, spolehlivost a adaptaci" HW/SW systémů. Projekt zahrnuje oblasti bezpečnosti IT, vestavěných systémů, jejich návrhu, modelování, simulace a diagnostiky. Zabývá se metodami automatizovaného návrhu a formální verifikace HW/SW systémů.

Description in English
TBD

FIT-S-10-1

Czech

Sekanina Lukáš, prof. Ing., Ph.D. - principal person responsible
Bartoš Pavel, Ing. - fellow researcher
Češka Milan, prof. RNDr., CSc. - fellow researcher
Drábek Vladimír, doc. Ing., CSc. - fellow researcher
Drahanský Martin, prof. Ing., Ph.D. - fellow researcher
Dudka Kamil, Ing. - fellow researcher
Dvořák Radim, Ing., Ph.D. - fellow researcher
Dvořák Václav, prof. Ing., DrSc. - fellow researcher
Fiedor Jan, Ing., Ph.D. - fellow researcher
Gach Marek, Ing. - fellow researcher
Grégr Matěj, Ing., Ph.D. - fellow researcher
Holík Lukáš, doc. Mgr., Ph.D. - fellow researcher
Hrubý Martin, Ing., Ph.D. - fellow researcher
Hýsek Jiří, Ing. - fellow researcher
Janoušek Vladimír, doc. Ing., Ph.D. - fellow researcher
Kajan Michal, Ing. - fellow researcher
Kaštil Jan, Ing., Ph.D. - fellow researcher
Kaštovský Petr, Ing. - fellow researcher
Kočí Radek, Ing., Ph.D. - fellow researcher
Konečný Filip, Ing., Ph.D. - fellow researcher

Department of Computer Systems
- responsible department (1.1.1989 - not assigned)
Department of Computer Systems
- internal (1.1.2010 - 31.12.2010)
Department of Information Systems
- internal (1.1.2010 - 31.12.2010)
Department of Intelligent Systems
- internal (1.1.2010 - 31.12.2010)
Faculty of Information Technology
- beneficiary (1.1.2010 - 31.12.2010)

ŠÁTEK, V. Analýza stiff soustav diferenciálních rovnic. Brno: Ústav inteligentních systémů FIT VUT v Brně, 2012. s. 0-0.
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HOLÍK, L. Simulations and Antichains for Efficient Handling of Finite Automata. Brno: Department of Intelligent Systems FIT BUT, 2011. p. 0-0.
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SVOJANOVSKÝ, P. Řízení rizik v bezpečnosti IT služeb. Brno: Ústav informačních systémů FIT VUT v Brně, 2010. s. 0-0.
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FIEDOR, J.; KŘENA, B.; LETKO, Z.; VOJNAR, T. A Uniform Classification of Common Concurrency Errors. FIT-TR-2010-03, Brno: 2010. p. 0-0.
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KŘENA, B.; LETKO, Z.; VOJNAR, T.; UR, S. A Platform for Search-Based Testing of Concurrent Software. 6th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Brno: Masaryk University, 2010. p. 208-208. ISBN: 978-80-87342-10-7.
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KOŘENEK, J. Rychlé vyhledávání regulárních výrazů s využitím technologie FPGA. Brno: Ústav počítačových systémů FIT VUT v Brně, 2010. s. 0-0.
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HOLÍK, L.; VOJNAR, T.; CHEN, Y.; MAYR, R.; HONG, C.; ABDULLA, P.; CLEMENTE, L. Simulation Subsumption in Ramsey-based Büchi Automata Universality and Inclusion Testing. FIT-TR-2010-02, Brno: Faculty of Information Technology BUT, 2010. p. 0-0.
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MALINKA, K.; HANÁČEK, P. Computational Social Networks - Security and Privacy. In Computational Social Networks - Security and Privacy. London: Springer London, 2012. p. 311-340. ISBN: 978-1-4471-4050-4.
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DE SILVA, G.; RYŠAVÝ, O.; MATOUŠEK, P.; ŠVÉDA, M. On Formal Reachability Analysis in Networks with Dynamic Behavior. TELECOMMUNICATION SYSTEMS, 2013, vol. 52, no. 2, p. 919-929. ISSN: 1018-4864.
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BARTOŠ, P. Test Time Reduction by Scan Chain Reordering. Proceedings of the 17th Conference STUDENT EEICT 2011. Volume 3. Brno: Faculty of Electrical Engineering and Communication BUT, 2011. p. 564-568. ISBN: 978-80-214-4273-3.
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SEDLÁČKOVÁ, J. FUNCTION POINT ANALYSIS AND WORKFLOW PROJECTS. Proceedings of the 16th Conference and Competition STUDENT EEICT 2010 Volume 5. Brno: Faculty of Information Technology BUT, 2010. p. 195-199. ISBN: 978-80-214-4080-7.
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SEKANINA, L.; KOMENDA, T. Global Control in Polymorphic Cellular Automata. Journal of Cellular Automata, 2011, vol. 6, no. 4, p. 301-321. ISSN: 1557-5969.
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POSPÍCHAL, P.; SCHWARZ, J.; JAROŠ, J. Acceleration of grammatical evolution using graphics processing units: computational intelligence on consumer games and graphics hardware. In Genetic and Evolutionary Computation Conference, GECCO'11 - Companion Publication. New York: Association for Computing Machinery, 2011. p. 431-438. ISBN: 978-1-4503-0690-4.
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SCHWARZ, J.; POSPÍCHAL, P. Optimizing Code For Graphics Processing Units. Počítačové architektury a diagnostika 2011. Bratislava: Slovak University of Technology in Bratislava, 2011. p. 79-84. ISBN: 978-80-227-3552-0.
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MALINKA, K.; HANÁČEK, P.; TRZOS, M. Evaluation of Biometric Authentication Based on Visual Evoked Potentials. Proceedings 45th International Carnahan Conference on Security Technology. Piscataway: Institute of Electrical and Electronics Engineers, 2011. p. 13-19. ISBN: 978-1-4577-0901-2.
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STRNADEL, J. Návrh časově kritických systémů IV: realizace prostředky RTOS. Automa, 2011, roč. 2011, č. 4, s. 58-60. ISSN: 1210-9592.
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HORÁČEK, J.; ZBOŘIL, F. Secured Agent Platform for Wireless Sensor Networks. Lecture Notes in Computer Science, 2011, vol. 2011, no. 4, p. 476-485. ISSN: 0302-9743.
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GAJDA, Z.; SEKANINA, L. On Evolutionary Synthesis of Compact Polymorphic Combinational Circuits. JOURNAL OF MULTIPLE-VALUED LOGIC AND SOFT COMPUTING, 2011, vol. 17, no. 6, p. 607-631. ISSN: 1542-3980.
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STRAKA, M.; KAŠTIL, J.; KOTÁSEK, Z. SEU Simulation Framework for Xilinx FPGA: First Step Towards Testing Fault Tolerant Systems. 14th EUROMICRO Conference on Digital System Design. Oulu: IEEE Computer Society, 2011. p. 223-230. ISBN: 978-0-7695-4494-6.
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BARTOŠ, P.; KOTÁSEK, Z.; DOHNAL, J. Decreasing Test Time by Scan Chain Reorganization. IEEE Design and Diagnostics of Electronic Circuits and Systems DDECS'2011. Cottbus: IEEE Computer Society, 2011. p. 371-374. ISBN: 978-1-4244-9753-9.
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Responsibility: Sekanina Lukáš, prof. Ing., Ph.D.