Project detail

Cryptographic privacy protection in 100GbE networks

Duration: 01.01.2016 — 31.12.2018

Funding resources

Ministerstvo vnitra ČR - Bezpečnostní výzkum České republiky 2015-2020

- whole funder (2016-01-01 - 2018-12-31)

On the project

Projekt je řešen v rámci bezpečnostního výzkumu MVČR.

Description in English
The project deals with the security of high-speed data communication for critical infrastructure. The main result is the cryptographic protection system for high-speed network devices operating at 10 to 100 Gbps. The system combines strong encryption ofdata traffic through the FPGA network card and hardware-protected elements (smart cards) for storing encryption keys and performing critical cryptographic algorithms.

Keywords
šifrování dat; FPGA; 100 GbE sítě; vysokorychlostní sítě; čipové karty

Key words in English
data encryption; FPGA; 100 GbE network; high-speed networks; smart cards

Mark

VI20162018036

Default language

Czech

People responsible

Hajný Jan, doc. Ing., Ph.D. - fellow researcher
Malina Lukáš, doc. Ing., Ph.D. - fellow researcher
Martinásek Zdeněk, doc. Ing., Ph.D. - fellow researcher
Vrba Kamil, prof. Ing., CSc. - principal person responsible

Units

Department of Telecommunications
- (2016-01-01 - 2018-12-31)
division-TKO-SIX
- (2016-01-01 - not assigned)

Results

MARTINÁSEK, Z.; DZURENDA, P.; MALINA, L. Profiling Power Analysis Attack Based on MLP in DPA Contest V4.2. In 39th International Conference on Telecommunications and Signal Processing (TSP). International Conference on Telecommunications and Signal Processing (TSP). 2016. p. 223-226. ISBN: 978-1-5090-1287-9. ISSN: 1805-5435.
Detail

CÍBIK, P. Low-latency AES encryption for High-Frequency Trading on FPGA. Proceedings I of the 30th Conference STUDENT EEICT 2024. Assoc. Prof. Vítězslav Novák. 2024. p. 236-240. ISBN: 978-80-214-6231-1.
Detail

MALINA, L.; HAJNÝ, J.; MARTINÁSEK, Z. Privacy-Preserving Authentication Systems Using Smart Devices. In International Conference on Telecommunications and Signal Processing (TSP) 39th. International Conference on Telecommunications and Signal Processing (TSP). 2016. p. 11-14. ISBN: 978-1-5090-1287-9. ISSN: 1805-5435.
Detail

MARTINÁSEK, Z.; HAJNÝ, J.; SMÉKAL, D.; MALINA, L.; MATOUŠEK, D.; KEKELY, M.; MENTENS, N. 200 Gbps Hardware Accelerated Encryption System for FPGA Network Cards. In The Second Workshop on Attacks and Solutions in Hardware Security (ASHES’18). Toronto, Canada: ACM, 2018. p. 11-17. ISBN: 978-1-4503-5996-2.
Detail

SMÉKAL, D.; HAJNÝ, J.; MARTINÁSEK, Z. Comparative Analysis of Different Implementations of Encryption Algorithms on FPGA Network Cards. In 15th IFAC Conference on Programmable Devices and Embedded Systems PDeS 2018. IFAC-PapersOnLine (ELSEVIER). Ostrava: IFAC-PapersOnLine, 2018. p. 312-317. ISSN: 2405-8963.
Detail

SMÉKAL, D.; HAJNÝ, J.; MARTINÁSEK, Z. Packet Generators on Field Programmable Gate Array Platform. In 2017 40th International Conference on Telecommunications and Signal Processing (TSP). International Conference on Telecommunications and Signal Processing (TSP). Barcelona, Španělsko: 2017. p. 97-100. ISBN: 978-1-5090-3982-1. ISSN: 1805-5435.
Detail

MARTINÁSEK, Z.; HAJNÝ, J.; MALINA, L.; MATOUŠEK, D. Hardware-Accelerated Encryption with Strong Authentication. In Security and Protection of Information. Security and Protection of Information. 2017. p. 1-10. ISSN: 2336-5587.
Detail

MARTINÁSEK, Z.; BLAŽEK, P.; ŠILHAVÝ, P.; SMÉKAL, D. Methodology for Correlations Discovery in Security Logs. In 2017 9th International Congress on Ultra Modern Telecommunications and Control Systems and Workshops (ICUMT). Mnichov, Německo: 2017. p. 294-298. ISBN: 978-1-5386-3434-9.
Detail

ŠTŮSEK, M.; POKORNÝ, J.; MAŠEK, P.; HAJNÝ, J.; HOŠEK, J. A Non-invasive Electricity Measurement within the Smart Grid Landscape: Arduino-based Visualization Platform for IoT. In 2017 9th International Congress on Ultra Modern Telecommunications and Control Systems and Workshops (ICUMT). Mnichov: 2017. p. 418-424. ISBN: 978-1-5386-3434-9.
Detail

SMÉKAL, D.; HAJNÝ, J.; MARTINÁSEK, Z.; MALINA, L.; VRBA, K.; MATOUŠEK, D. Vysokorychlostní šifrování se silnou autentizací na platformě FPGA. In Sborník MKB 2017. 2017. s. 45-53.
Detail

MLÝNEK, P.; MARTINÁSEK, Z. Evaluation of PLC using simulation and laboratory measurements. Sborník konference WSPLC. 2017. p. 1-2.
Detail

SMÉKAL, D.; HAJNÝ, J.; MARTINÁSEK, Z. Hardware-Accelerated Twofish Core for FPGA. In 2018 41st International Conference on Telecommunications and Signal Processing (TSP). International Conference on Telecommunications and Signal Processing (TSP). Atény, Řecko: 2018. p. 338-341. ISBN: 978-1-5386-4695-3. ISSN: 1805-5435.
Detail

SMÉKAL, D.; MARTINÁSEK, Z.; MALINA, L.; HAJNÝ, J.; VRBA, K.; MATOUŠEK, D.: Šifrovací jádro AES; Software symetrického šifrování v FPGA. Ústav telekomunikací, Technická 12, 616 00 Brno. URL: http://crypto.utko.feec.vutbr.cz/?page_id=54. (software)
Detail

KEKELY, M.; MATOUŠEK, D.; SMÉKAL, D.; MARTINÁSEK, Z.; MALINA, L.; HAJNÝ, J.; VRBA, K.: Crypto100; Hardwarová akcelerace kryptografického zabezpečení pro vysokorychlostní sítě. Netcope Technologies a.s.. (funkční vzorek)
Detail

MALINA, L.; MARTINÁSEK, Z.: IKE_PSK_SAM_v1; Software autentizačního modulu využívající chráněné uložiště. Ústav telekomunikací, Technická 12, 616 00 Brno. URL: http://crypto.utko.feec.vutbr.cz/?page_id=54. (software)
Detail

Responsibility: Vrba Kamil, prof. Ing., CSc.