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ŠIMEK, V. RŮŽIČKA, R.
Original Title
Reconfigurable Platform with Polymorphic Digital Gates and Partial Reconfiguration Feature
Type
conference paper
Language
English
Original Abstract
Nowadays there can be evidently identified several important application fields, such as evolvable hardware, fault-tolerant architectures or circuit development, where the exploitation of partial reconfiguration principles may bring significant benefits. For conventional digital designs, a wide range of solutions comprising fine- to coarse-grained architectures are available on the market or e.g. as virtual reconfigurable circuits. But for polymorphic digital circuits (polymorphic digital circuit is able to perform more than one function, it typically has one stable structure for all functions and an actually performed function depends on a state of an environment) only one small-scale solution has been reported so far - the REPOMO. In this paper, main attention is given to the proposal of an approach with increased flexibility, where the resulting capabilities are demonstrated.
Keywords
reconfigurable circuit, polymorphic electronics, partial reconfiguration
Authors
ŠIMEK, V.; RŮŽIČKA, R.
RIV year
2014
Released
21. 10. 2014
Publisher
IEEE Computer Society
Location
Pisa
ISBN
978-1-4799-7411-5
Book
Proceedings on UKSim-AMSS 8th European Modelling Symposium on Mathematical Modelling and Computer Simulation
Pages from
501
Pages to
506
Pages count
6
BibTex
@inproceedings{BUT111576, author="Václav {Šimek} and Richard {Růžička}", title="Reconfigurable Platform with Polymorphic Digital Gates and Partial Reconfiguration Feature", booktitle="Proceedings on UKSim-AMSS 8th European Modelling Symposium on Mathematical Modelling and Computer Simulation", year="2014", pages="501--506", publisher="IEEE Computer Society", address="Pisa", doi="10.1109/EMS.2014.26", isbn="978-1-4799-7411-5" }