Publication detail

SWITCHED - CAPACITOR ADC WITH LOW POWER CONSUMPTION - BEHAVIOURAL MODELLING

HÁZE, J. VRBA, R. SKOČDOPOLE, M. FUJCIK, L.

Original Title

SWITCHED - CAPACITOR ADC WITH LOW POWER CONSUMPTION - BEHAVIOURAL MODELLING

Type

conference paper

Language

English

Original Abstract

A paper deals with 12-bit, low power switched- capacitor (SC) analog-todigital converter (ADC). Since the ADC will be used in portable applications the low power consumption is the key task for design. The paper focuses on block design of ADC and its behavioural modelling. The basic block topology design is also outlined. Techniques for avoiding of capacitor mismatch, clock feedthrough, finite gain and offset of Op-Amp etc. are utilized in the design.

Keywords

A/D Converter, switched capacitors, low power, error correction, block diagram.

Authors

HÁZE, J.; VRBA, R.; SKOČDOPOLE, M.; FUJCIK, L.

RIV year

2004

Released

1. 12. 2004

Location

Crete, Greece

ISBN

80-214-2819-8

Book

Socrates Workshop 2004. Intensive Training Programme in Electronic

Edition number

1

Pages from

162

Pages to

167

Pages count

6

BibTex

@inproceedings{BUT11884,
  author="Jiří {Háze} and Radimír {Vrba} and Michal {Skočdopole} and Lukáš {Fujcik}",
  title="SWITCHED - CAPACITOR ADC WITH LOW POWER CONSUMPTION - BEHAVIOURAL MODELLING",
  booktitle="Socrates Workshop 2004. Intensive Training Programme in Electronic",
  year="2004",
  number="1",
  pages="6",
  address="Crete, Greece",
  isbn="80-214-2819-8"
}