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Publication detail
NIKL, V.
Original Title
High Performance Computing on Low Power Devices
Type
article in a collection out of WoS and Scopus
Language
English
Original Abstract
Nowadays, the power efficiency of modern processors is becoming more and more important next to the overall performance itself. Many programming tasks and problems do not scale very well with higher number of cores due to being memory or communication bound, therefore it is often not beneficial to use faster chips to achieve better runtimes. In this case, employing slower low power processors or accelerators may be much more efficient, mainly because it is possible to get the same results using much less energy. Dynamic runtime adjustments applied to the system based on the properties of a given algorithm, such as frequency and voltage scaling or switching off unneeded parts, may further enhance power efficiency. This paper describes the benefits of using low power chips for building an HPC cluster, the group of algorithms where this approach can be useful, possible system adjustments towards better power efficiency, results achieved so far and future plans.
Keywords
HPC, parallelism, low power, processor architecture, supercomputers, k-Wave, MPI, OpenMP, performance evaluation, numerical methods, clocking
Authors
Released
16. 9. 2016
Publisher
Faculty of Information Technology BUT
Location
Brno
ISBN
978-80-214-5376-0
Book
Computer achitectures and diagnostics 2016
Pages from
81
Pages to
84
Pages count
4
URL
http://www.fit.vutbr.cz/events/pad2016/download/sbornik_pad_2016.pdf
BibTex
@inproceedings{BUT130995, author="Vojtěch {Nikl}", title="High Performance Computing on Low Power Devices", booktitle="Computer achitectures and diagnostics 2016", year="2016", pages="81--84", publisher="Faculty of Information Technology BUT", address="Brno", isbn="978-80-214-5376-0", url="http://www.fit.vutbr.cz/events/pad2016/download/sbornik_pad_2016.pdf" }