Publication detail

Evolutionary Functional Approximation of Circuits Implemented into FPGAs

VAŠÍČEK, Z. MRÁZEK, V. SEKANINA, L.

Original Title

Evolutionary Functional Approximation of Circuits Implemented into FPGAs

Type

conference paper

Language

English

Original Abstract

In many applications it is acceptable to allow a smallerror in the result if significant improvements are obtained interms of performance, area or energy efficiency. Exploiting thisprinciple is particularly important for FPGA-based solutions thatare inherently subject to many resources- oriented constraints.This paper devises an automated method that enables to approximatecircuit components which are often implemented inmultiple instances in FPGA-based accelerators. The approximation process starts with a fully functional gate-level circuit, whichis approximated by means of Cartesian Genetic Programmingreflecting the error metric and constraints formulated by theuser. The evolved circuits are then implemented for a particularFPGA by common FPGA synthesis and optimization tools. It isshown using five different FPGA tools, that the approximationsobtained by CGP working at the gate level are preserved at thelevel look-up tables of FPGAs. The proposed method is evaluatedin the task of 8-bit adder, 8-bit multiplier, 9-input median and 25-input median approximation. 

Keywords

functional approximation
evolutionary algorithm
equivalence
FPGA synthesis

Authors

VAŠÍČEK, Z.; MRÁZEK, V.; SEKANINA, L.

Released

15. 8. 2016

Publisher

Institute of Electrical and Electronics Engineers

Location

Athens

ISBN

978-1-5090-4240-1

Book

2016 IEEE Symposium Series on Computational Intelligence

Pages from

1

Pages to

8

Pages count

8

URL

BibTex

@inproceedings{BUT131010,
  author="Zdeněk {Vašíček} and Vojtěch {Mrázek} and Lukáš {Sekanina}",
  title="Evolutionary Functional Approximation of Circuits Implemented into FPGAs",
  booktitle="2016 IEEE Symposium Series on Computational Intelligence",
  year="2016",
  pages="1--8",
  publisher="Institute of Electrical and Electronics Engineers",
  address="Athens",
  doi="10.1109/SSCI.2016.7850173",
  isbn="978-1-5090-4240-1",
  url="https://www.fit.vut.cz/research/publication/11243/"
}

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