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PODIVÍNSKÝ, J. ČEKAN, O. LOJDA, J. ZACHARIÁŠOVÁ, M. KRČMA, M. KOTÁSEK, Z.
Original Title
Functional Verification Based Platform for Evaluating Fault Tolerance Properties
Type
journal article in Web of Science
Language
English
Original Abstract
The fundamental topic of this article is the interconnection of simulation-based functional verification, which is standardly used for removing design errors from simulated hardware systems, with fault-tolerant mechanisms that serve for hardening electro-mechanical FPGA SRAM-based systems against faults. For this purpose, an evaluation platform that connects these two approaches was designed and tested for one particular casestudy: a robot that moves through a maze (its electronic part is the robot controller and the mechanical part is the robot itself). However, in order to make the evaluation platform generally applicable for various electro-mechanical systems, several subtopics and sub-problems need to solved. For example, the electronic controller can have several representations (hard-coded, processor based, neural-network based) and for each option, extendability of verification environment must be possible. Furthermore, in order to check complex behavior of verified systems, different verification scenarios must be prepared and this is the role of random generators or effective regression tests scenarios. Also, despite the transfer of the controller to the SRAM-based FPGA which was solved together with an injection of artificial faults, many more experiments must be done in order to create a sufficient fault-tolerant methodology that indicates how a general electronic controller can be hardened against faults by different fault-tolerant mechanisms in order to make it reliable enough in the real environment. All these additional topics are presented in this article together with some side experiments that led to their integration into the evaluation platform.
Keywords
Functional verification, Robot controller, Electro-mechanical systems, Fault tolerance, Maze generation
Authors
PODIVÍNSKÝ, J.; ČEKAN, O.; LOJDA, J.; ZACHARIÁŠOVÁ, M.; KRČMA, M.; KOTÁSEK, Z.
Released
1. 7. 2017
ISBN
0141-9331
Periodical
Microprocessors and Microsystems
Year of study
52
Number
5
State
Kingdom of the Netherlands
Pages from
145
Pages to
159
Pages count
15
URL
http://www.sciencedirect.com/science/article/pii/S0141933117300200
BibTex
@article{BUT144405, author="Jakub {Podivínský} and Ondřej {Čekan} and Jakub {Lojda} and Marcela {Zachariášová} and Martin {Krčma} and Zdeněk {Kotásek}", title="Functional Verification Based Platform for Evaluating Fault Tolerance Properties", journal="Microprocessors and Microsystems", year="2017", volume="52", number="5", pages="145--159", doi="10.1016/j.micpro.2017.06.004", issn="0141-9331", url="http://www.sciencedirect.com/science/article/pii/S0141933117300200" }
Documents
printed_podivinsky_casopis.pdf