Publication detail

Simple two operational transconductance amplifiers-based electronically controllable bilinear two port for fractional-order synthesis

ŠOTNER, R. POLÁK, L. JEŘÁBEK, J. PETRŽELA, J.

Original Title

Simple two operational transconductance amplifiers-based electronically controllable bilinear two port for fractional-order synthesis

Type

journal article in Web of Science

Language

English

Original Abstract

This Letter introduces a new circuit topology of the simple electronically controllable voltage-mode bilinear two port (BTP) employing two operational transconductance amplifiers. The proposed two-port circuit is completely resistorless and contains only a grounded capacitor. It has a high-impedance input (a simple cascading of sections is possible) and allows an independent electronic adjusting of zero and pole frequency of the transfer function. The operation of the BTP circuit is demonstrated for two different locations of the pole and zero frequency coordinates. Moreover, a direct application of four BTPs in fractional-order integrators (order −0.11 and −0.33) with phase shifts −10° and −30° is shown. Design specification is verified by experimental measurements.

Keywords

Bilinear two port, electronic adjusting, fractional-order synthesis, integrator, operational transconductance amplifiers,

Authors

ŠOTNER, R.; POLÁK, L.; JEŘÁBEK, J.; PETRŽELA, J.

Released

8. 8. 2018

Publisher

IET

Location

The Institution of Engineering and Technology, Michael Faraday House, Six Hills Way, Stevenage, Herts., SG1 2AY, UK

ISBN

0013-5194

Periodical

Electronics Letters

Year of study

54

Number

20

State

United Kingdom of Great Britain and Northern Ireland

Pages from

1164

Pages to

1166

Pages count

2

URL

https://ieeexplore.ieee.org/document/8475068

BibTex

@article{BUT149311,
  author="Roman {Šotner} and Ladislav {Polák} and Jan {Jeřábek} and Jiří {Petržela}",
  title="Simple two operational transconductance amplifiers-based electronically controllable bilinear two port for fractional-order synthesis",
  journal="Electronics Letters",
  year="2018",
  volume="54",
  number="20",
  pages="1164--1166",
  doi="10.1049/el.2018.5575",
  issn="0013-5194",
  url="https://ieeexplore.ieee.org/document/8475068"
}