Publication detail

Scalable Construction of Approximate Multipliers With Formally Guaranteed Worst Case Error

MRÁZEK, V. VAŠÍČEK, Z. SEKANINA, L. JIANG, H. HAN, J.

Original Title

Scalable Construction of Approximate Multipliers With Formally Guaranteed Worst Case Error

Type

journal article in Web of Science

Language

English

Original Abstract

Approximate computing exploits the fact that many applications are inherently error resilient. In order to reduce power consumption, approximate circuits such as multipliers have been employed in these applications. However, most current approximate multipliers are based on ad-hoc circuit structures and, for automated circuit approximation methods, large efficient designs are difficult to find due to the increased search space. Moreover, existing design methods do not typically provide sufficient formal guarantees in terms of error if large approximate multipliers are constructed. To address these challenges, this brief introduces a general and efficient method for constructing large high-quality approximate multipliers with respect to the objectives formulated in terms of the power-delay product and a provable error bound. This is demonstrated by means of a comparative evaluation of approximate 16-bit multipliers constructed by the proposed method and other methods in the literature.

Keywords

Approximate computing circuits and systems, circuit synthesis, circuits, computers and information processing

Authors

MRÁZEK, V.; VAŠÍČEK, Z.; SEKANINA, L.; JIANG, H.; HAN, J.

Released

1. 11. 2018

ISBN

1063-8210

Periodical

IEEE Trans. on VLSI Systems.

Year of study

26

Number

11

State

United States of America

Pages from

2572

Pages to

2576

Pages count

5

URL

BibTex

@article{BUT155014,
  author="MRÁZEK, V. and VAŠÍČEK, Z. and SEKANINA, L. and JIANG, H. and HAN, J.",
  title="Scalable Construction of Approximate Multipliers With Formally Guaranteed Worst Case Error",
  journal="IEEE Trans. on VLSI Systems.",
  year="2018",
  volume="26",
  number="11",
  pages="2572--2576",
  doi="10.1109/TVLSI.2018.2856362",
  issn="1063-8210",
  url="https://www.fit.vut.cz/research/publication/11678/"
}