Patent detail

Method and an apparatus for automatic processor design and verification

PŘIKRYL, Z. HUSÁR, A. MASAŘÍK, K. HRUŠKA, T.

Patent type

Patent

Abstract

see http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=% 2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=9235669.PN.&OS=PN/9235669&RS=PN/9 235669

Keywords

processor design, verification

Patent number

US9235669

Date of application

18. 4. 2014

Date of registration

12. 1. 2016

Date of expiry

18. 4. 2034

Owner

Codasip s.r.o.

Possibilities of use

Use of the result by another entity is possible without acquiring a license in some cases

Licence fee

The licensor does not require a license fee for the result in some cases

www

http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=9286268.PN.&OS=PN/9286268&RS=PN/9286268