Publication detail

Hardware cryptographic module for FPGA with dynamic hash functions routing

KERNDL, M. ŠTEFFAN, P.

Original Title

Hardware cryptographic module for FPGA with dynamic hash functions routing

Type

conference paper

Language

English

Original Abstract

This paper deals with design of hardware cryptographic module for System-on-Chip that can be simulated on FPGA. The main function of this module is dynamic routing of SHA-3 hash function candidates that are commonly used s X11 hash algorithm. Proposed design was verified and evaluated using Virtual Platform methodology and aims to be an example of development of system based on Virtual Platform. Designed architecture can be deployed on FPGA or real hardware platform. This hardware can be used in Internet-of-Things or another related applications.

Keywords

dynamic routing; hash function; system-on-chip; virtual platform;FPGA; internet-of-things

Authors

KERNDL, M.; ŠTEFFAN, P.

Released

10. 9. 2019

Location

Vysoké učení technické v Brně Fakulta elektrotechniky a komunikačních technologií

ISBN

978-80-214-5781-2

Book

Proceedings of IEEE Student Branch Conference Mikulov 2019

Edition number

1

Pages from

39

Pages to

41

Pages count

53

URL

https://www.radio.feec.vutbr.cz/ieee/userfiles/downloads/archive/2019-Mikulov/sbornik.pdf

BibTex

@inproceedings{BUT158569,
  author="Michal {Kerndl} and Pavel {Šteffan}",
  title="Hardware cryptographic module for FPGA with dynamic hash functions routing",
  booktitle="Proceedings of IEEE Student Branch Conference Mikulov 2019",
  year="2019",
  number="1",
  pages="39--41",
  address="Vysoké učení technické v Brně
Fakulta elektrotechniky a komunikačních technologií",
  isbn="978-80-214-5781-2",
  url="https://www.radio.feec.vutbr.cz/ieee/userfiles/downloads/archive/2019-Mikulov/sbornik.pdf"
}