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Publication detail
Lukas Fujcik, Thibault Mougel
Original Title
Design of decimation filter for novel Sigma-Delta modulator
Type
conference paper
Language
English
Original Abstract
This paper describes steps involved in a new VHDL design of a decimation filter for a sigma-delta (Σ∆) modulator. Parameters of decimation filter are derived from the specifications of the overall Σ∆ modulator. Using Matlab and MathCAD tool it is possible to find the filter order, the required quantization level for the coefficients and their values. Finally, by analyzing the design, we can find an efficient way to implement the filter in hardware. This structure is designed in two versions using VHDL. The first version is programmed and tested on a FPGA chip. Then second version was created for Cadence software tool to implement into a chip in the AMIS CMOS 0.7 µm technology.
Keywords
sigma-delta modulator, decimation filter
Authors
RIV year
2005
Released
1. 1. 2005
Publisher
Technical University of Sofia
Location
Bulgaria
ISBN
954-438-521-5
Book
THE FOURTEENT INTERNATIONAL SCIENTIFIC AND APPLIED SCIENCE CONFERENCE - ELECTRONICS ET'2005
Pages from
58
Pages to
63
Pages count
6
BibTex
@inproceedings{BUT15924, author="Lukáš {Fujcik} and Thibault {Mougel}", title="Design of decimation filter for novel Sigma-Delta modulator", booktitle="THE FOURTEENT INTERNATIONAL SCIENTIFIC AND APPLIED SCIENCE CONFERENCE - ELECTRONICS ET'2005", year="2005", pages="6", publisher="Technical University of Sofia", address="Bulgaria", isbn="954-438-521-5" }