Publication result detail

Extremely low-voltage low-power differential difference current conveyor using multiple-input bulk-driven technique

KUMNGERN, M.; KHATEB, F.; KULEJ, T.

Original Title

Extremely low-voltage low-power differential difference current conveyor using multiple-input bulk-driven technique

English Title

Extremely low-voltage low-power differential difference current conveyor using multiple-input bulk-driven technique

Type

WoS Article

Original Abstract

In this paper, a new differential difference current conveyor (DDCC) with ultra-low voltage and low-power capability is presented. The DDCC is designed by using a non-tailed differential pair with multiple-input bulk-driven MOS transistor technique to obtain a rail-to-rail input common-mode swing and extremely low supply voltage. The MOS transistors biased in the sub-threshold region have been used to achieve extremely low power consumption. The performance of the proposed DDCC is evaluated by simulation results using SPICE program and MOS transistors parameters provided by a standard n-well 0.18 mu m CMOS process from TSMC. A rail-to-rail input common-mode range was shown and a high accuracy was expressed. The bandwidth was 2.2 kHz and the total harmonic distortion was 1% for an input signal with amplitude of 240 mV(p-p), obtained at supply voltage of 0.3 V and power dissipation of 28.6 nW. The proposed DDCC has been used to realize a sixth-order low-pass filter for application to electrocardiogram (ECG) applications. (C) 2020 Elsevier GmbH. All rights reserved.

English abstract

In this paper, a new differential difference current conveyor (DDCC) with ultra-low voltage and low-power capability is presented. The DDCC is designed by using a non-tailed differential pair with multiple-input bulk-driven MOS transistor technique to obtain a rail-to-rail input common-mode swing and extremely low supply voltage. The MOS transistors biased in the sub-threshold region have been used to achieve extremely low power consumption. The performance of the proposed DDCC is evaluated by simulation results using SPICE program and MOS transistors parameters provided by a standard n-well 0.18 mu m CMOS process from TSMC. A rail-to-rail input common-mode range was shown and a high accuracy was expressed. The bandwidth was 2.2 kHz and the total harmonic distortion was 1% for an input signal with amplitude of 240 mV(p-p), obtained at supply voltage of 0.3 V and power dissipation of 28.6 nW. The proposed DDCC has been used to realize a sixth-order low-pass filter for application to electrocardiogram (ECG) applications. (C) 2020 Elsevier GmbH. All rights reserved.

Keywords

Differential difference current conveyor; Subthreshold technique; Bulk-driven technique; Multiple-input bulk-driven technique; Low voltage and low power; High-order filter; Analog circuit

Key words in English

Differential difference current conveyor; Subthreshold technique; Bulk-driven technique; Multiple-input bulk-driven technique; Low voltage and low power; High-order filter; Analog circuit

Authors

KUMNGERN, M.; KHATEB, F.; KULEJ, T.

RIV year

2021

Released

04.09.2020

Publisher

Elsevier

Location

MUNICH

ISBN

1434-8411

Periodical

AEÜ. International journal of electronics and communications

Volume

123

Number

1, IF: 2.924

State

Federal Republic of Germany

Pages from

1

Pages to

11

Pages count

11

URL

https://www.sciencedirect.com/science/article/pii/S1434841120310669

Full text in the Digital Library

http://hdl.handle.net/11012/198988

BibTex

@article{BUT164934,
  author="Montree {Kumngern} and Fabian {Khateb} and Tomasz {Kulej}",
  title="Extremely low-voltage low-power differential difference current conveyor using multiple-input bulk-driven technique",
  journal="AEÜ. International journal of electronics and communications",
  year="2020",
  volume="123",
  number="1, IF: 2.924",
  pages="1--11",
  doi="10.1016/j.aeue.2020.153310",
  issn="1434-8411",
  url="https://www.sciencedirect.com/science/article/pii/S1434841120310669"
}

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