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BARDONEK, P. ZACHARIÁŠOVÁ, M.
Original Title
Using Control Logic Drivers for Automated Generation of System-level Portable Models
Type
conference paper
Language
English
Original Abstract
Portable Test and Stimulus Standard is a new Accellera standard for an abstract definition of the verification intent that can be used for stimuli generation for different types of verification environments and at different levels of design hierarchy. Despite the idea behind the standard is clear and well received by the general public, there is still a lot of work to make the magic happen inside of the interpretation tools. In this paper, we focus on vertical reuse of portable models which is basically about adapting portable models for block-level designs to portable models defined at the subsystem or system-level. This adaptation is usually based on manually defined (sub)system-level control restrictions and resources sharing restrictions. Our goal is to define algorithms which do transformations of portable models so as the restrictions are automatically added or suggestions for the user are made. In our first experiments, we focus on building control restrictions based on the control logic drivers extracted from the subsystem-level design. We present our first results on the floating-point unit and RISC-V processor-based subsystem as they fit to represents the vertical reuse in a clear manner.
Keywords
PSS, portable stimuli, portable models, Universal Verification Methodology (UVM)
Authors
BARDONEK, P.; ZACHARIÁŠOVÁ, M.
Released
1. 4. 2020
Publisher
Institute of Electrical and Electronics Engineers
Location
Novi Sad
ISBN
978-1-7281-9938-2
Book
23rd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2020
Pages from
1
Pages to
4
Pages count
URL
https://www.fit.vut.cz/research/publication/12195/
BibTex
@inproceedings{BUT168123, author="Petr {Bardonek} and Marcela {Zachariášová}", title="Using Control Logic Drivers for Automated Generation of System-level Portable Models", booktitle="23rd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2020", year="2020", pages="1--4", publisher="Institute of Electrical and Electronics Engineers", address="Novi Sad", doi="10.1109/DDECS50862.2020.9095708", isbn="978-1-7281-9938-2", url="https://www.fit.vut.cz/research/publication/12195/" }
Documents
DDECS_2020_Bard_Zach.pdf