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MALINA, L. CÍBIK, P. JEDLIČKA, P. SMÉKAL, D. RICCI, S. HRABOVSKÝ, J.
Original Title
Hardware-based Cryptographic Accelerator for Post Quantum Era
Type
conference paper
Language
English
Original Abstract
In this work, we present a hardware-based cryptographic accelerator that provides resistance to quantum computer attacks. Directly in VHDL, we design and implement essential cryptographic functions which can be loaded to our accelerator equipped with the FPGA board. Our solution provides efficient encryption, signing, and hashing operations for securing the input data or network packets. Moreover, we create a high-level software demonstrator for setting and using these operations in the accelerator. The presented results prove that cryptography functions accelerated in our hardware-based solution are more efficient than software implementations. Therefore, our solution can provide high-speed and quantum secure data processing.
Keywords
Acceleration; Cryptography; FPGA; Hardware Implementation; Security; Quantum-Resistant Cryptography
Authors
MALINA, L.; CÍBIK, P.; JEDLIČKA, P.; SMÉKAL, D.; RICCI, S.; HRABOVSKÝ, J.
Released
26. 10. 2021
ISBN
978-1-6654-0219-4
Book
13th International Congress on Ultra Modern Telecommunications and Control Systems and Workshops (ICUMT)
Pages from
149
Pages to
155
Pages count
7
BibTex
@inproceedings{BUT172912, author="Lukáš {Malina} and Peter {Cíbik} and Petr {Jedlička} and David {Smékal} and Sara {Ricci} and Jakub {Hrabovský}", title="Hardware-based Cryptographic Accelerator for Post Quantum Era", booktitle="13th International Congress on Ultra Modern Telecommunications and Control Systems and Workshops (ICUMT)", year="2021", pages="149--155", isbn="978-1-6654-0219-4" }