Publication detail

Designing series of fractional-order elements

KOTON, J. DVORAK, J. KUBANEK, D. HERENCSAR, N.

Original Title

Designing series of fractional-order elements

Type

journal article in Web of Science

Language

English

Original Abstract

In this paper we propose an efficient approach to design fractional-order elements' (FOEs) series, while using a very limited set of "seed" FOEs. The proposed approach follows the idea of general immittance inverter/converter, whereas a suitable circuit solution employing operational transconductance amplifiers is also presented and can be used for the design of grounded FOEs with the fractional order alpha being in the range [-2,2]. The proposed circuit may simply be extended to design fractional-order elements from wider range of alpha to follow designers' requirements. To show the efficiency of the described technique, the use of only up to two "seed" FOEs with properly selected fractional order alpha seed as passive elements results in the design of a series of 17 FOEs with different alpha being in the range [-2,2]. Cadence post-layout simulation results are presented that prove operability and robustness of our design concept. Basic fractional 1.75-order low-pass filter is also presented to show the utilization of a FOE being implemented by the proposed GIC.

Keywords

Fractional-order element; Transformation; Immittance inverter; converter; OTA

Authors

KOTON, J.; DVORAK, J.; KUBANEK, D.; HERENCSAR, N.

Released

8. 3. 2021

Publisher

SPRINGER

Location

DORDRECHT

ISBN

0925-1030

Periodical

ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING

Year of study

106

Number

3

State

Kingdom of the Netherlands

Pages from

553

Pages to

563

Pages count

11

URL

https://link.springer.com/content/pdf/10.1007/s10470-021-01811-4.pdf

Full text in the Digital Library

http://hdl.handle.net/11012/203538

BibTex

@article{BUT175697,
  author="Jaroslav {Koton} and Jan {Dvořák} and David {Kubánek} and Norbert {Herencsár}",
  title="Designing series of fractional-order elements",
  journal="ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING",
  year="2021",
  volume="106",
  number="3",
  pages="553--563",
  doi="10.1007/s10470-021-01811-4",
  issn="0925-1030",
  url="https://link.springer.com/content/pdf/10.1007/s10470-021-01811-4.pdf"
}