Publication detail

Design and Implementation of the Memory Scheduler for the FPGA - Based Router

MAREK, T., CRHA, L., NOVOTNÝ, M.

Original Title

Design and Implementation of the Memory Scheduler for the FPGA - Based Router

Type

conference paper

Language

English

Original Abstract

This paper deals with a design of a memory scheduler as a part of the Liberouter project.

Keywords

FPGA, DDR SDRAM, memory, router, IPV6

Authors

MAREK, T., CRHA, L., NOVOTNÝ, M.

RIV year

2004

Released

1. 9. 2004

Publisher

Springer Verlag

Location

Leuven

ISBN

3-540-22989-2

Book

Proc. of the Field Programmable Logic and Application 2004

Pages from

1133

Pages to

1139

Pages count

6

BibTex

@inproceedings{BUT17581,
  author="Tomáš {Marek} and Luděk {Bryan} and Martin {Novotný}",
  title="Design and Implementation of the Memory Scheduler for the FPGA - Based Router",
  booktitle="Proc. of the Field Programmable Logic and Application 2004",
  year="2004",
  pages="1133--1139",
  publisher="Springer Verlag",
  address="Leuven",
  isbn="3-540-22989-2"
}