Publication detail

Reconfigurable image processing architecture with Simulink prototyping support

SCHIER, J. KOVÁŘ, B. ZEMČÍK, P. HEROUT, A. BERAN, V.

Original Title

Reconfigurable image processing architecture with Simulink prototyping support

Type

article in a collection out of WoS and Scopus

Language

English

Original Abstract

The contribution is focused on conversion of block schematics prepared in Simulink into a scripting language so that the output can be used for reconfiguration of the flexible architecture based on DSP and FPGA for implementation of such block schematics.

Keywords

Simulink, DSP, FPGA, scripting language

Authors

SCHIER, J.; KOVÁŘ, B.; ZEMČÍK, P.; HEROUT, A.; BERAN, V.

Released

15. 11. 2005

Location

Praha

Pages from

1

Pages to

4

Pages count

4

BibTex

@inproceedings{BUT18056,
  author="Jan {Schier} and Bohumil {Kovář} and Pavel {Zemčík} and Adam {Herout} and Vítězslav {Beran}",
  title="Reconfigurable image processing architecture with Simulink prototyping support",
  booktitle="Sborník {"}Technical Computing 2005{"}",
  year="2005",
  pages="1--4",
  address="Praha"
}