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AKBARI, M. MAWLOOD HUSSEIN S. HASHIM Y. KHATEB, F. KULEJ, T. KEA-TIONG, T.
Original Title
Implementation of a Multipath Fully Differential OTA in 0.18-mu m CMOS Process
Type
journal article in Web of Science
Language
English
Original Abstract
This brief implements a highly efficient fully differential transconductance amplifier, based on several input-to-output paths. Some traditional techniques, such as positive feedback, nonlinear tail current sources, and current mirror-based paths, are combined to increase the transconductance, thus leading to larger dc gain and higher gain bandwidth (GBW) product. Two flipped voltage-follower (FVF) cells are employed as variable current sources to provide class-AB operation and adaptive biasing of all other drivers. The proposed structure includes several input-to-output paths that play the role of dynamic current boosters during the slewing phase, thus improving the slew rate (SR) performance. The circuit was fabricated in a TSMC 0.18-mu m CMOS process with a silicon area of 54.5 x 30.1 mu m. Experimental results show a GBW of 173.3 MHz, a dc gain of 72.7 dB, and an SR of 139.4 V/mu s for a capacitive load of 2 x 5 pF. The proposed circuit consumes 619 mu W of power, under a supply voltage of 1.8 V.
Keywords
Amplifier; class-AB; CMOS; fully differential; operational transconductance amplifier (OTA); positive feedback; slew rate (SR); transconductance
Authors
AKBARI, M.; MAWLOOD HUSSEIN S.; HASHIM Y.; KHATEB, F.; KULEJ, T.; KEA-TIONG, T.
Released
9. 1. 2023
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Location
PISCATAWAY
ISBN
1557-9999
Periodical
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
Year of study
31
Number
1
State
United States of America
Pages from
147
Pages to
151
Pages count
5
URL
https://ieeexplore.ieee.org/document/9944072
BibTex
@article{BUT180738, author="AKBARI, M. and MAWLOOD HUSSEIN S. and HASHIM Y. and KHATEB, F. and KULEJ, T. and KEA-TIONG, T.", title="Implementation of a Multipath Fully Differential OTA in 0.18-mu m CMOS Process", journal="IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS", year="2023", volume="31", number="1", pages="147--151", doi="10.1109/TVLSI.2022.3218741", issn="1557-9999", url="https://ieeexplore.ieee.org/document/9944072" }