Publication detail

Design of Multi-bit Pulsed Latches with Scan Input in CMOS ONK65 Technology

KRÁL, V.

Original Title

Design of Multi-bit Pulsed Latches with Scan Input in CMOS ONK65 Technology

Type

journal article in Web of Science

Language

English

Original Abstract

This paper presents a new multi-bit pulse latch design that places innovative emphasis on the integration of scan input for automatic test pattern generation (ATPG). Two different designs have been developed in ONK65 technology (65 nm process): the first with standard threshold voltage (SVT) tailored for consumer products and the second with high threshold voltage (HVT) for automotive, each addressing specific aspects of process, voltage, and temperature (PVT). Multi-bit pulse latches offer a more efficient alternative to multi-bit flip-flop circuits and promise significant power and area savings. However, the efficiency of these latches depends on the technology, library type and customer requirements. A multi-bit pulse latch consists of a pulse generator and a pulsed latch. Each component is carefully designed for its specific purpose and the most appropriate topology is selected. Furthermore, the paper serves as a comprehensive guide to the design of low-power digital cells. It rethinks the topology design approach by emphasizing the scan input and presents simulation results for both components of the multi-bit pulse latch, highlighting their advantages. The results show that a less strict PVT offers greater benefits than a strict PVT.

Keywords

5G chips, area-friendly design, automotive, consumer flip-flops, digital standard cell, dynamic power, leakage, low power chips, multi-bit pulsed latch, pulsed latch, saving area, scan mode, serial shifter, static power

Authors

KRÁL, V.

Released

6. 11. 2023

Publisher

Czech Technical University in Prague

ISBN

1210-2512

Periodical

Radioengineering

Year of study

32

Number

4

State

Czech Republic

Pages from

557

Pages to

567

Pages count

11

URL

https://www.radioeng.cz/fulltexts/2023/23_04_0557_0567.pdf

BibTex

@article{BUT187905,
  author="Vojtěch {Král}",
  title="Design of Multi-bit Pulsed Latches with Scan Input in CMOS ONK65 Technology",
  journal="Radioengineering",
  year="2023",
  volume="32",
  number="4",
  pages="557--567",
  doi="10.13164/re.2023.0557",
  issn="1210-2512",
  url="https://www.radioeng.cz/fulltexts/2023/23_04_0557_0567.pdf"
}