Publication detail

The use of VHDL in designing with gate arrays

ZENDULKA, J.

Original Title

The use of VHDL in designing with gate arrays

Type

article in a collection out of WoS and Scopus

Language

English

Keywords

field programmable gate array, Xilinx, VHDL, simulation

Authors

ZENDULKA, J.

Released

1. 1. 1996

Location

Krnov

ISBN

80-85988-03-8

Book

Proceedings of MOSIS'96, Volume 2

Pages from

142

Pages to

147

Pages count

6

BibTex

@inproceedings{BUT191399,
  author="Jaroslav {Zendulka}",
  title="The use of VHDL in designing with gate arrays",
  booktitle="Proceedings of MOSIS'96, Volume 2",
  year="1996",
  pages="142--147",
  address="Krnov",
  isbn="80-85988-03-8"
}