Publication detail

Reconfigurable Image Processing Architecture

ZEMČÍK, P. HEROUT, A. BERAN, V. SCHIER, J. FUČÍK, O.

Original Title

Reconfigurable Image Processing Architecture

Type

article in a collection out of WoS and Scopus

Language

English

Original Abstract

The paper is focused on architectures for image processing on reconfigurable architectures based on DSP and FPGA circuits. Main focus is on main principles and methods of reconfiguration.

Keywords

image processing, configurable hardware, FPGA, digital signal processing, DSP

Authors

ZEMČÍK, P.; HEROUT, A.; BERAN, V.; SCHIER, J.; FUČÍK, O.

RIV year

2005

Released

19. 12. 2005

Location

Cairo

ISBN

1687-398X

Periodical

Proceedings of GVIP 2005

State

Arab Republic of Egypt

Pages from

1

Pages to

6

Pages count

6

BibTex

@inproceedings{BUT21487,
  author="Pavel {Zemčík} and Adam {Herout} and Vítězslav {Beran} and Jan {Schier} and Otto {Fučík}",
  title="Reconfigurable Image Processing Architecture",
  booktitle="Proceedings of GVIP2005",
  year="2005",
  journal="Proceedings of GVIP 2005",
  pages="1--6",
  address="Cairo",
  issn="1687-398X"
}