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ČERNÝ, S. STRUŽKA, P. KOŘENEK, J. MARTÍNEK, T. KOTÁSEK, Z.
Original Title
FPGA Components in Simulink
Type
conference paper
Language
English
Original Abstract
The paper gives a brief view on possibilities how to exploit modeling features of Simulink interconnected with Processor Expert to finalize code of VHDL components placed in FPGA. Such an FPGA can be used to deliver powerful co-processing unit where main processing unit (e.g. microcontroller) is not powerful enough and/or the task to be solved is somehow special.
Keywords
VHDL, FPGA, code generation, Simulink, modeling, Processor Expert
Authors
ČERNÝ, S.; STRUŽKA, P.; KOŘENEK, J.; MARTÍNEK, T.; KOTÁSEK, Z.
RIV year
2006
Released
5. 9. 2006
Location
Ostrava
ISBN
80-86840-26-3
Book
Proceedings of XXVIIIth International Autumn Colloquium ASIS 2006
Pages from
158
Pages to
163
Pages count
6
BibTex
@inproceedings{BUT22261, author="Stanislav {Černý} and Petr {Stružka} and Jan {Kořenek} and Tomáš {Martínek} and Zdeněk {Kotásek}", title="FPGA Components in Simulink", booktitle="Proceedings of XXVIIIth International Autumn Colloquium ASIS 2006", year="2006", pages="158--163", address="Ostrava", isbn="80-86840-26-3" }