Publication detail
Design of Phase Locked-Loop for Very Slow Sine-Wave Signals
HÁZE, J. VRBA, R. PROKOP, R.
Original Title
Design of Phase Locked-Loop for Very Slow Sine-Wave Signals
Type
conference paper
Language
English
Original Abstract
The paper describes the design procedure of phase locked loop (PLL). This PLL is used in band-pass sigma-delta modulator to synchronise the input slow sine-wave signal with driving clock of modulator. It generates 62,5 kHz rectangle driving signal. The paper also shows simulation results, which confirm the design process .
Keywords
phase locked-loop
Authors
HÁZE, J.; VRBA, R.; PROKOP, R.
RIV year
2008
Released
16. 1. 2008
Publisher
IEEE
Location
Cancun
ISBN
978-0-7695-3105-2
Book
Proceedings of IEEE International Conference on Systems ICONS 2008
Pages from
67
Pages to
71
Pages count
5
BibTex
@inproceedings{BUT28637,
author="Jiří {Háze} and Radimír {Vrba} and Roman {Prokop}",
title="Design of Phase Locked-Loop for Very Slow Sine-Wave Signals",
booktitle="Proceedings of IEEE International Conference on Systems ICONS 2008",
year="2008",
pages="67--71",
publisher="IEEE",
address="Cancun",
isbn="978-0-7695-3105-2"
}