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ŠKARVADA, J. HERRMAN, T. KOTÁSEK, Z.
Original Title
Testability Analysis Based on the Identification of Testable Blocks with Predefined Properties
Type
conference paper
Language
English
Original Abstract
In the paper, the methodology of testability analysis based on the concept of testable blocks is presented. In the methodology the power consumption during test application is also taken into account. For this purpose, power estimation tool was developed and implemented. Integration of the developed software into the Mentor Graphics design flow is described. Experimental results gained as a consequence of applying the methodology on both benchmark and practical designs are demonstrated. The intensions for future research are presented.
Keywords
Testable block, power consumption estimation, test vectors generation, power consumption optimization
Authors
ŠKARVADA, J.; HERRMAN, T.; KOTÁSEK, Z.
RIV year
2007
Released
29. 8. 2007
Publisher
IEEE Computer Society
Location
Lübeck
ISBN
0-7695-2978-X
Book
10th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN Architectures, Methods and Tools (DSD 2007)
Pages from
611
Pages to
618
Pages count
8
BibTex
@inproceedings{BUT28825, author="Jaroslav {Škarvada} and Tomáš {Herrman} and Zdeněk {Kotásek}", title="Testability Analysis Based on the Identification of Testable Blocks with Predefined Properties", booktitle="10th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN Architectures, Methods and Tools (DSD 2007)", year="2007", pages="611--618", publisher="IEEE Computer Society", address="Lübeck", isbn="0-7695-2978-X" }