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ADAMEC, F. FRÝZA, T.
Original Title
Design -Time Configurable Processor Basic Structure
Type
conference paper
Language
English
Original Abstract
In this work the concept of design time configurable processor is introduced. The basic architecture of designed processor core and the basic instruction set. There are described minimal core configuration (integer core) and its programming model. Processor tightly coupled peripheral like a Cache, Memory Management Unit, Protection Unit and Segment Unit are introduced. There are as well the proposed blocks for power management and power save modes. In the conclusion, the comparison between other similar designs is outlined. There is summarized actual state of work and future work is proposed as well.
Keywords
Design-time configurable processor, tightly coupled peripheral, integer core, power management.
Authors
ADAMEC, F.; FRÝZA, T.
RIV year
2010
Released
14. 4. 2010
Publisher
Vienna University of Technology, Austria
Location
Vienna, Austria
ISBN
978-1-4244-6610-8
Book
Proceedings of the 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems.
Pages from
119
Pages to
120
Pages count
2
BibTex
@inproceedings{BUT29683, author="Filip {Adamec} and Tomáš {Frýza}", title="Design -Time Configurable Processor Basic Structure", booktitle="Proceedings of the 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems.", year="2010", pages="119--120", publisher="Vienna University of Technology, Austria", address="Vienna, Austria", isbn="978-1-4244-6610-8" }