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MÁLEK, T. MARTÍNEK, T. KOŘENEK, J.
Original Title
GICS: Generic Interconnection System
Type
article in a collection out of WoS and Scopus
Language
English
Original Abstract
The division of an application between a conventional processor and an acceleration card with FPGA chips has been proved as a suitable way for an acceleration of computationally intensive tasks. In such applications, the designer usually has to implement an interconnection between components placed in FPGA and the host system bus. This task is often complicated by different requirements of user components for throughput, latency of reading operations, need for DMA transfers etc. The objective of this work is to show a new approach for implementation of interconnection systems and to enable the designer to focus on the development of the target application. The proposed interconnection system is based on tree topology. The system eliminates the sensitivity of wide buses to the distance, supports the connection of components with different requirements for throughput, supports split transaction model and many other features. The proposed system is implemented and evaluated on chips with Virtex 5 technology.
Keywords
Interconnection system, PCI Express, FPGA
Authors
MÁLEK, T.; MARTÍNEK, T.; KOŘENEK, J.
RIV year
2008
Released
8. 9. 2008
Publisher
IEEE Computer Society
Location
Heidelberg
ISBN
978-1-4244-1960-9
Book
2008 International Conference on Field Programmable Logic and Applications
Pages from
263
Pages to
268
Pages count
6
BibTex
@inproceedings{BUT30714, author="Tomáš {Málek} and Tomáš {Martínek} and Jan {Kořenek}", title="GICS: Generic Interconnection System", booktitle="2008 International Conference on Field Programmable Logic and Applications", year="2008", pages="263--268", publisher="IEEE Computer Society", address="Heidelberg", doi="10.1109/FPL.2008.4629942", isbn="978-1-4244-1960-9" }