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VAŠÍČEK, Z.
Original Title
Towards Automatic Design of Competitive Image Filters in FPGAs
Type
article in a collection out of WoS and Scopus
Language
English
Original Abstract
This paper presents a new approach to the FPGA implementation of image filters which are utilized to remove the salt and pepper noise of high intensity. An evolutionary algorithm (EA) is utilized to find a set of image filters which can be employed in a bank of image filters. The main advantage of this approach is that the bank of evolutionary designed filters requires four times less resources on a chip in comparison with the adaptive median filter while the visual quality of filtering is preserved. The proposed solution also exhibits a very good behavior for the impulse bursts noise. In order to design image filters in reasonable time, an FPGA-based evolutionary platform is utilized. The proposed platform is based on the implementation of a search algorithm in the PowerPC processor which is available in Xilinx Virtex II Pro and newer FPGAs. As the search algorithm as well as the evaluation of candidate solution runs in FPGA, the evolutionary design of image filters needs approx. 44 times less time to design a human-competitive filter when compared to the same algorithm running on the common PC.
Keywords
evolutionary design, image filter, bank of filters
Authors
RIV year
2008
Released
18. 11. 2008
Publisher
Technical University Wien
Location
Vienna
ISBN
978-3-200-01612-5
Book
Proceedings of Junior Scientist Conference 2008
Pages from
55
Pages to
56
Pages count
2
BibTex
@inproceedings{BUT30722, author="Zdeněk {Vašíček}", title="Towards Automatic Design of Competitive Image Filters in FPGAs", booktitle="Proceedings of Junior Scientist Conference 2008", year="2008", pages="55--56", publisher="Technical University Wien", address="Vienna", isbn="978-3-200-01612-5" }