Publication detail

Transistor-level Evolution of Digital Circuits Using a Special Circuit Simulator

ŽALOUDEK, L. SEKANINA, L.

Original Title

Transistor-level Evolution of Digital Circuits Using a Special Circuit Simulator

Type

article in a collection out of WoS and Scopus

Language

English

Original Abstract

An evolutionary algorithm is used to design digital circuits at the transistor level. In particular, various static CMOS circuits with up to four inputs were evolved. The increase in the complexity of evolved circuits wrt existing circuits evolved at the transistor level is primarily caused by two phenomena: the usage of a specialized circuit simulator and restriction of the search space. Because we restricted the search space to the set of  "reasonable designs" we could employ imperfect, but very fast circuit simulation. The usage of proposed simulator allowed exploring more candidate designs than a conventional Spice-based approach. However, in some cases, an incorrect behavior was detected after validation of evolved circuits using Spice simulator.

Keywords

evolutionary design, digital circuit, transistor-level design

Authors

ŽALOUDEK, L.; SEKANINA, L.

RIV year

2008

Released

1. 9. 2008

Publisher

Springer Verlag

Location

Berlin

ISBN

978-3-540-85856-0

Book

Evolvable Systems: From Biology to Hardware

Edition

Lecture Notes in Computer Science

Pages from

320

Pages to

331

Pages count

12

URL

https://www.fit.vut.cz/research/publication/8665/

BibTex

@inproceedings{BUT30755,
  author="Luděk {Žaloudek} and Lukáš {Sekanina}",
  title="Transistor-level Evolution of Digital Circuits Using a Special Circuit Simulator",
  booktitle="Evolvable Systems: From Biology to Hardware",
  year="2008",
  series="Lecture Notes in Computer Science",
  volume="5216",
  pages="320--331",
  publisher="Springer Verlag",
  address="Berlin",
  isbn="978-3-540-85856-0",
  url="https://www.fit.vut.cz/research/publication/8665/"
}