Publication detail

MULTIPLYING DIGITAL-TO-ANALOG CONVERTER WITH 1,5 AND 2,5 BIT RESOLUTION - CASE STUDY

HÁZE, J. KLEDROWETZ, V.

Original Title

MULTIPLYING DIGITAL-TO-ANALOG CONVERTER WITH 1,5 AND 2,5 BIT RESOLUTION - CASE STUDY

Type

conference paper

Language

English

Original Abstract

The paper deals with design of the most important stage in pipelined analog-to-digital converter (ADC) so-called multiplying digital-to-analog converter (MDAC). The MDAC with 1,5 and 2,5 bit of resolution were designed using CMOS 07 technology. The both types of MDAC were compared and the results are also presented. All stages were proposed utilizing Cadence design software.

Keywords

pipelined ADC, MDAC, operational amplifier

Authors

HÁZE, J.; KLEDROWETZ, V.

Released

9. 9. 2009

Publisher

IMAPS CZ/SK

Location

Brno

ISBN

978-80-214-3717-3

Book

Proceedings on 15th International EDS Conference 2008

Pages from

326

Pages to

332

Pages count

6

BibTex

@inproceedings{BUT32416,
  author="Jiří {Háze} and Vilém {Kledrowetz}",
  title="MULTIPLYING DIGITAL-TO-ANALOG CONVERTER WITH 1,5 AND 2,5 BIT RESOLUTION - CASE STUDY",
  booktitle="Proceedings on 15th International EDS Conference 2008",
  year="2009",
  pages="326--332",
  publisher="IMAPS CZ/SK",
  address="Brno",
  isbn="978-80-214-3717-3"
}