Publication detail
Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs
KOŘENEK, J. SEKANINA, L.
Original Title
Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs
Type
article in a collection out of WoS and Scopus
Language
English
Original Abstract
A specialized architecture was developed and evaluated to evolve relatively
large sorting networks in an ordinary FPGA. Genetic unit and fitness function are also implemented on the same FPGA. We evolved sorting networks up to N=28. The evolution of the largest sorting networks requires 10 hours in FPGA running at 100 MHz. The experiments were performed using COMBO6 card.
Keywords
Evolution, FPGA, sorting network
Authors
KOŘENEK, J.; SEKANINA, L.
RIV year
2005
Released
8. 9. 2005
Publisher
Springer Verlag
Location
Berlin
ISBN
978-3-540-28736-0
Book
Evolvable Systems: From Biology to Hardware
Edition
Lecture Notes in Computer Science
Pages from
46
Pages to
55
Pages count
10
URL
BibTex
@inproceedings{BUT33687,
author="Jan {Kořenek} and Lukáš {Sekanina}",
title="Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs",
booktitle="Evolvable Systems: From Biology to Hardware",
year="2005",
series="Lecture Notes in Computer Science",
volume="3637",
pages="46--55",
publisher="Springer Verlag",
address="Berlin",
isbn="978-3-540-28736-0",
url="http://www.fit.vutbr.cz/~sekanina/publ/ices05/sn.pdf"
}