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MARTÍNEK, T. LEXA, M. VOŽENÍLEK, J.
Original Title
Architecture model for approximate palindrome detection
Type
conference paper
Language
English
Original Abstract
Understanding the structure and function of DNA sequences represents an important area of research in modern biology. One of the interesting structures occurring in DNA is a palindrome. Biologists believe that palindromes play an important role in regulation of gene activity and other cell processes because they are often observed near promoters, introns and specific untranslated regions. Unfortunately, the time complexity of algorithms for palindrome detection increases when mutations in the form of character insertions, deletions or substitutions are taken into consideration. In recent years, several works have been aimed at acceleration of such algorithms using dedicated circuits capable of potentially large-scale searching. However, widespread use of such circuits is often complicated by varying user task details or the need to use a specific target platform. The objective of this work is therefore to create a model of hardware architecture for approximate palindrome detection and develop a technique for automatic mapping of this model to the target platform without intervention of an experienced designer. The proposed model and the mapping technique are implemented and evaluated on a family of chips with Virtex5 technology.
Keywords
approximate palindrome detection, architecture model, Virtex5, FPGA
Authors
MARTÍNEK, T.; LEXA, M.; VOŽENÍLEK, J.
RIV year
2009
Released
15. 4. 2009
Publisher
IEEE Computer Society
Location
Liberec
ISBN
978-1-4244-3339-1
Book
2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems
Pages from
90
Pages to
95
Pages count
6
URL
https://www.fit.vut.cz/research/publication/8925/
BibTex
@inproceedings{BUT33721, author="Tomáš {Martínek} and Matej {Lexa} and Jan {Voženílek}", title="Architecture model for approximate palindrome detection", booktitle="2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems", year="2009", pages="90--95", publisher="IEEE Computer Society", address="Liberec", doi="10.1109/DDECS.2009.5012105", isbn="978-1-4244-3339-1", url="https://www.fit.vut.cz/research/publication/8925/" }