Publication detail

Optimization of FIR filter implementation for FMT on VLIW DSP

SYSEL, P. KRAJSA, O.

Original Title

Optimization of FIR filter implementation for FMT on VLIW DSP

Type

conference paper

Language

English

Original Abstract

The paper summarizes the FMT modulation prototype filter design and its efficient implementation on DSP. The optimum design of algorithms for digital signal processors with VLIW architecture is described. Using this new approach it was, for example, possible to optimize compilation from the C language into the assembler of TMS320C6414 digital signal processor for implementation of FMT modulation with prototype FIR filter. The method consists in a closer linkage between the theory of digital signal processing, software tools and hardware.

Keywords

Assembler Programming, Digital Signal Processor, Filtered MultiTone Modulation, Prototype Filter, State-Space Representation, Very Long Instruction Word.

Authors

SYSEL, P.; KRAJSA, O.

RIV year

2010

Released

22. 7. 2010

Publisher

WSEAS Press

Location

Corfu

ISBN

978-960-474-208-0

Book

Proceedings of the 4th International Conference on Circuits, Systems and Signals (CSS'10)

Edition

1

Edition number

1

Pages from

169

Pages to

173

Pages count

5

BibTex

@inproceedings{BUT34356,
  author="Petr {Sysel} and Ondřej {Krajsa}",
  title="Optimization of FIR filter implementation for FMT on VLIW DSP",
  booktitle="Proceedings of the 4th International Conference on Circuits, Systems and Signals (CSS'10)",
  year="2010",
  series="1",
  number="1",
  pages="169--173",
  publisher="WSEAS Press",
  address="Corfu",
  isbn="978-960-474-208-0"
}