Publication detail

High level validation of an optimization algorithm for the implementation of adaptive Wavelet Transforms in FPGAs

SALVADOR, R. MORENO, F. RIESGO, T. SEKANINA, L.

Original Title

High level validation of an optimization algorithm for the implementation of adaptive Wavelet Transforms in FPGAs

Type

article in a collection out of WoS and Scopus

Language

English

Original Abstract

The work reported in this paper describes the steps given towards an FPGA-based implementation of evolvable wavelet transforms for image compression in embedded systems. An Evolutionary Algorithm (EA) for the design and optimization of the transform coefficients is tailored for a suitable System on Chip implementation. Several cut downs on the computing requirements have been done to the original algorithm, adapting it for the FPGA implementation. What this paper addresses more specifically is the validation of the algorithm using fixed point arithmetic for the whole optimization process. The results show how high quality transforms are evolved from scratch with limited precision arithmetic. Also, preliminary results of the implementation in an FPGA device are included.

Keywords

FPGA, evolution strategy, image compression, wavelet transform, embedded system

Authors

SALVADOR, R.; MORENO, F.; RIESGO, T.; SEKANINA, L.

RIV year

2010

Released

13. 9. 2010

Publisher

IEEE Computer Society

Location

Los Alamitos

ISBN

978-0-7695-4171-6

Book

Proc. of 13th Euromicro Conference on Digital System Design

Pages from

96

Pages to

103

Pages count

8

BibTex

@inproceedings{BUT34925,
  author="Ruben {Salvador} and Felix {Moreno} and Teresa {Riesgo} and Lukáš {Sekanina}",
  title="High level validation of an optimization algorithm for the implementation of adaptive Wavelet Transforms in FPGAs",
  booktitle="Proc. of 13th Euromicro Conference on Digital System Design",
  year="2010",
  pages="96--103",
  publisher="IEEE Computer Society",
  address="Los Alamitos",
  isbn="978-0-7695-4171-6"
}