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Publication detail
PUŠ, V.
Original Title
Optimizations of packet classification algorithms
Type
article in a collection out of WoS and Scopus
Language
English
Original Abstract
This paper deals with packet classification in computer networks. As network speeds are increasing, the demand for hardware acceleration of packet classification in FPGAs or ASICs are growing. Nowadays algorithms implemented in hardware can achieve multigigabit speeds, but they suffer with great memory overhead. A new architecture which reduces memory overhead of decomposition methods for packet classification is proposed.
Keywords
Packet classification, FPGA, Optimization
Authors
RIV year
2010
Released
13. 9. 2010
Publisher
Faculty of Information Technology BUT
Location
Češkovice
ISBN
978-80-214-4140-8
Book
Počítačové architektury & diagnostika 2010
Pages from
153
Pages to
158
Pages count
6
BibTex
@inproceedings{BUT34931, author="Viktor {Puš}", title="Optimizations of packet classification algorithms", booktitle="Počítačové architektury & diagnostika 2010", year="2010", pages="153--158", publisher="Faculty of Information Technology BUT", address="Češkovice", isbn="978-80-214-4140-8" }