Publication detail

FPGA Based Test Module for Error Bit Evaluation in Serial Links

KOLOUCH, J.

Original Title

FPGA Based Test Module for Error Bit Evaluation in Serial Links

Type

journal article - other

Language

English

Original Abstract

Test module based on FPGA is designed for serial links. Errors detected by test are preliminarily evaluated and corresponding information is sent by the Ethernet interface into a master computer. The module is suitable for long-term testing without need of human intervention.

Keywords

serial link, bit error rate, LFSR counter, FPGA

Authors

KOLOUCH, J.

RIV year

2006

Released

1. 4. 2006

Publisher

Ústav radioelektroniky, VUT v Brně

Location

Brno

ISBN

1210-2512

Periodical

Radioengineering

Year of study

2006

Number

1

State

Czech Republic

Pages from

38

Pages to

41

Pages count

4

BibTex

@article{BUT43006,
  author="Jaromír {Kolouch}",
  title="FPGA Based Test Module for Error Bit Evaluation in Serial Links",
  journal="Radioengineering",
  year="2006",
  volume="2006",
  number="1",
  pages="38--41",
  issn="1210-2512"
}