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VEČEŘA, I., VRBA, R., LUDVÍK, J.
Original Title
Modified RSD Analog Digital Converter with BIST Technology
Type
conference paper
Language
English
Original Abstract
Paper deals with pipelined switched-current A/D converter designed in 0.6 im BiCMOS technology with embedded BIST features. Modified RSD redundant-sign-digit conventional-restoring algorithm was implemented what decreases the amount of high-precision components. By changing from pipeline conversion to cycling mode, less power dissipation is obtained at the expense of conversion time (less than 1 iA current consumption in sleep mode). Since the switched-current structure changes the mode of operation of current copiers, large fault coverage can be reached if creating proper design-for-test. Proposed A/D converter is suitable for conversion of the current with very low amplitude from analog into digital domain. Current mode enables operation down to 3V thus is suitable for battery powered applications.
Key words in English
current mode, A/D converter, RSD redundant-sign-digit, pipeline architecture, BiCMOS, BIST
Authors
RIV year
2002
Released
1. 10. 2002
Publisher
WSEAS
Location
Rio de Janeiro
ISBN
960-8052-74-9
Book
2002 WSEAS International Conference on System Science, Applied Mathematics & Computer Science, and Power Engineering Systems
Pages from
2211
Pages to
2213
Pages count
3
BibTex
@inproceedings{BUT4654, author="Ivo {Večeřa} and Radimír {Vrba} and Jan {Ludvík}", title="Modified RSD Analog Digital Converter with BIST Technology", booktitle="2002 WSEAS International Conference on System Science, Applied Mathematics & Computer Science, and Power Engineering Systems", year="2002", pages="3", publisher="WSEAS", address="Rio de Janeiro", isbn="960-8052-74-9" }