Přístupnostní navigace
E-application
Search Search Close
Publication detail
KVÁŠ, M. VALACH, S. ČERVINKA, L.
Original Title
External Sdram Memory in FPGA Based Design
Type
conference paper
Language
English
Original Abstract
Even though amount of memory integrated on the FPGA chip grows, it is sufficient for rather low demanding applications only. Even smaller members of low-cost FPGA family, Spartan 6, have enough logical resources to perform relatively complex functionality, but memory is often the limiting factor. The only solution is to use external memories. From the reliability point of view the external memory introduces to the system new risks in the form of potential hardware malfunction, soft errors in external memory and necessary architectural changes. This paper evaluates additional risks, costs and gains specific for external memories.
Keywords
FPGA, soft-core, soft-errors, fault-tolerance, SDRAM
Authors
KVÁŠ, M.; VALACH, S.; ČERVINKA, L.
RIV year
2011
Released
23. 11. 2011
Publisher
DAAAM International
Location
Vienna, Austria
ISBN
978-3-901509-83-4
Book
Annals of DAAAM for 2011 & Proceedings of the 22nd International DAAAM Symposium
1726-9679
Periodical
Inteligent Manufacturing and Automation: Focus on Young Researches and Scientists
State
Republic of Austria
Pages from
545
Pages to
546
Pages count
2
BibTex
@inproceedings{BUT76195, author="Marek {Kváš} and Soběslav {Valach} and Luděk {Červinka}", title="External Sdram Memory in FPGA Based Design", booktitle="Annals of DAAAM for 2011 & Proceedings of the 22nd International DAAAM Symposium", year="2011", journal="Inteligent Manufacturing and Automation: Focus on Young Researches and Scientists", pages="545--546", publisher="DAAAM International", address="Vienna, Austria", isbn="978-3-901509-83-4", issn="1726-9679" }