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PRISTACH, M. FUJCIK, L.
Original Title
Serial IIR Filter Generator for ASIC
Type
conference paper
Language
English
Original Abstract
The paper presents an infinite impulse response (IIR) filter generator for application specific integration circuits (ASICs). The paper describes the filter architecture with serial calculation. This architecture utilizes one shared multiply and accumulate (MAC) unit in order to achieve minimal area on chip. A software in C++ language for automatic filter generation was written. The software generates fully synthesizable VHDL description of filter, batch file for simulator and test-bench file for filter verification from the filter specification file.
Keywords
application specific integration circuits, hardware description language, infinite impulse response filter, multiply and accumulate unit
Authors
PRISTACH, M.; FUJCIK, L.
RIV year
2012
Released
28. 6. 2012
Publisher
Vysoké učení technické v Brně
Location
Brno
ISBN
978-80-214-4539-0
Book
Electronic Devices and Systems IMAPS CS International Conference 2011 Proceedings
Edition
první
Pages from
219
Pages to
223
Pages count
5
BibTex
@inproceedings{BUT93774, author="Marián {Pristach} and Lukáš {Fujcik}", title="Serial IIR Filter Generator for ASIC", booktitle="Electronic Devices and Systems IMAPS CS International Conference 2011 Proceedings", year="2012", series="první", pages="219--223", publisher="Vysoké učení technické v Brně", address="Brno", isbn="978-80-214-4539-0" }