Publication detail

Non-Stationary Statistical Simulation of Blind-Oversampling CDR Circuits

KOLKA, Z. KUBÍČEK, M. BIOLKOVÁ, V. BIOLEK, D.

Original Title

Non-Stationary Statistical Simulation of Blind-Oversampling CDR Circuits

Type

conference paper

Language

English

Original Abstract

Statistical approach is the only practical set of methods for reliable simulation of Clock and Data Recovery circuits which operate at low bit-error rates. The paper deals with a statistical simulation model for blind-oversampling CDR circuits, which estimate the center of the data eye by counting the edges in several subintervals that divide the signal period. In the steady-state, the process is described by the multinomial distribution. The developed model simulates the estimation process in the non-stationary case, which allows including sinusoidal jitter, and frequency offset. Some simulation results are presented.

Keywords

Blind oversampling CDR; jitter tolerance; statistical methods;

Authors

KOLKA, Z.; KUBÍČEK, M.; BIOLKOVÁ, V.; BIOLEK, D.

RIV year

2013

Released

27. 2. 2013

Publisher

IEEE

Location

Cusco, Peru

ISBN

978-1-4244-9485-9

Book

Proceedings of 2013 IEEE Fourth Latin American Symposium on Circuits and Systems (LASCAS 2013)

Pages from

1

Pages to

4

Pages count

4

BibTex

@inproceedings{BUT102778,
  author="Zdeněk {Kolka} and Michal {Kubíček} and Viera {Biolková} and Dalibor {Biolek}",
  title="Non-Stationary Statistical Simulation of Blind-Oversampling CDR Circuits",
  booktitle="Proceedings of 2013 IEEE Fourth Latin American Symposium on Circuits and Systems (LASCAS 2013)",
  year="2013",
  pages="1--4",
  publisher="IEEE",
  address="Cusco, Peru",
  doi="10.1109/LASCAS.2013.6519045",
  isbn="978-1-4244-9485-9"
}