Publication detail

Self-Reconfigurable Evolvable Hardware System for Adaptive Image Processing

SALVADOR, R. OTERO, A. MORA, J. DE LA TORRE, E. RIESGO, T. SEKANINA, L.

Original Title

Self-Reconfigurable Evolvable Hardware System for Adaptive Image Processing

Type

journal article in Web of Science

Language

English

Original Abstract

This paper presents an evolvable hardware system, fully contained in an FPGA, which is capable of autonomously generating digital processing circuits, implemented on an array of processing elements (PEs). Candidate circuits are generated by an embedded evolutionary algorithm and implemented by means of dynamic partial reconfiguration, enabling evaluation in the final hardware. The PE array follows a systolic approach, and PEs do not contain extra logic such as path multiplexers or unused logic, so array performance is high. Hardware evaluation in the target device and the fast reconfiguration engine used yield smaller reconfiguration than evaluation times. This means that the complete evaluation cycle is faster than software-based approaches and previous evolvable digital systems. The selected application is digital image filtering and edge detection. The evolved filters yield better quality than classic linear and nonlinear filters using mean absolute error as standard comparison metric. Results do not only show better circuit adaptation to different noise types and intensities, but also a nondegrading filtering behavior. This means they may be run iteratively to enhance filtering quality. These properties are even kept for high noise levels (40 percent). The system as a whole is a step toward fully autonomous, adaptive systems.

Keywords

evolutionary computing, genetic algorithms, evolvable hardware, FPGAs, self-adaptive systems, reconfigurable hardware, adaptable architectures, autonomous systems

Authors

SALVADOR, R.; OTERO, A.; MORA, J.; DE LA TORRE, E.; RIESGO, T.; SEKANINA, L.

RIV year

2013

Released

2. 7. 2013

ISBN

0018-9340

Periodical

IEEE TRANSACTIONS ON COMPUTERS

Year of study

62

Number

8

State

United States of America

Pages from

1481

Pages to

1493

Pages count

12

BibTex

@article{BUT103423,
  author="Ruben {Salvador} and Andres {Otero} and Javier {Mora} and Eduardo {De la Torre} and Teresa {Riesgo} and Lukáš {Sekanina}",
  title="Self-Reconfigurable Evolvable Hardware System for Adaptive Image Processing",
  journal="IEEE TRANSACTIONS ON COMPUTERS",
  year="2013",
  volume="62",
  number="8",
  pages="1481--1493",
  doi="10.1109/TC.2013.78",
  issn="0018-9340"
}