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PSOTA, B. BURŠÍK, M. SZENDIUCH, I.
Original Title
The Use of Computer Simulation in the Electronic Packaging Process
English Title
Type
journal article - other
Language
Czech
Original Abstract
This paper deals with the use of the computer simulation for semiconductor chip attach investigation, where the wire bonding is the mostly used process. The main focus lays on the correct definition of the capillary trace, which is essential for creation of a good bond contact as for chip, as well for package or substrate pad. Several simulations for different shapes of loops were created and compared with real bonds, which were done based on the settings from the analysis.
English abstract
Keywords
ANSYS Workbench, Chip Connection, Simulation, Wirebonding
Key words in English
Authors
PSOTA, B.; BURŠÍK, M.; SZENDIUCH, I.
RIV year
2013
Released
18. 11. 2013
Publisher
Trans Tech Publications
Location
Switzerland
ISBN
1013-9826
Periodical
Key Engineering Materials (print)
Year of study
2014
Number
592-593
State
Swiss Confederation
Pages from
201
Pages to
204
Pages count
4
BibTex
@article{BUT104295, author="Boleslav {Psota} and Martin {Buršík} and Ivan {Szendiuch}", title="The Use of Computer Simulation in the Electronic Packaging Process", journal="Key Engineering Materials (print)", year="2013", volume="2014", number="592-593", pages="201--204", doi="10.4028/www.scientific.net/KEM.592-593.201", issn="1013-9826" }