Publication detail

Hash-based Pattern Matching for High Speed Networks

FUKAČ, T. KOŘENEK, J.

Original Title

Hash-based Pattern Matching for High Speed Networks

Type

conference paper

Language

English

Original Abstract

Regular expression matching is a complex task which is widely used in network security monitoring applications. With the growing speed of network links and the number of regular expressions, pattern matching architectures have to be improved to retain wire-speed processing. Multi-striding is a well-known technique to increase processing speed but it requires a lot of FPGA resources. Therefore, we focus on the design of new hardware architecture for fast pre-filtering of network traffic. The proposed pre-filter performs fast hash-based matching of short strings, which are specific for matched regular expressions. As the proposed pre-filter significantly reduces input traffic, exact pattern matching can operate on significantly lower speeds. Then the exact pattern match can be done by CPU or by a slow automaton with a few hardware resources. The paper provides analyses of false-positive detection of the pre-filter with respect to the length of matching strings. The number of false-positives is low, even if the length of the selected strings is short. Therefore input traffic can be significantly reduced. For 100 Gb links, the pre-filter reduced the input data to 1.83 Gbps using four-symbol strings.

Keywords

regular expression matching, pattern matching, hash function, high speed network, network security

Authors

FUKAČ, T.; KOŘENEK, J.

Released

1. 4. 2019

Publisher

Institute of Electrical and Electronics Engineers

Location

Cluj-Napoca

ISBN

978-1-7281-0073-9

Book

Proceedings - 2019 22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2019

Pages from

1

Pages to

5

Pages count

5

URL

https://ieeexplore.ieee.org/document/8724652

BibTex

@inproceedings{BUT158074,
  author="Tomáš {Fukač} and Jan {Kořenek}",
  title="Hash-based Pattern Matching for High Speed Networks",
  booktitle="Proceedings - 2019 22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2019",
  year="2019",
  pages="1--5",
  publisher="Institute of Electrical and Electronics Engineers",
  address="Cluj-Napoca",
  doi="10.1109/DDECS.2019.8724652",
  isbn="978-1-7281-0073-9",
  url="https://ieeexplore.ieee.org/document/8724652"
}