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CRHA, A. ŠIMEK, V. RŮŽIČKA, R.
Original Title
PAIG Rewriting: The Way to Scalable Multifunctional Digital Circuits Synthesis
Type
conference paper
Language
English
Original Abstract
Main objective of this paper is to introduce a novel methodology for scalable synthesis of multifunctional (polymorphic) digital circuits. Despite the fact that several approaches have been proposed during recent years, those are applicable for small-scale circuits only or based on various evolution-inspired techniques. Obviously, there does not exist yet scalable synthesis methodology for complex multifunctional circuits. The proposed methodology is based on And-Inverter Graphs (AIGs) with built-in extension for multifunctional circuits where the employment of rewriting technique reduces the area by sharing common resources of two different input circuits. Experiments on publicly available benchmark circuits demonstrate significant area reduction.
Keywords
Logic synthesis, polymorphic circuits, AIG, rewriting, PAIG, optimization.
Authors
CRHA, A.; ŠIMEK, V.; RŮŽIČKA, R.
Released
28. 8. 2019
Publisher
Institute of Electrical and Electronics Engineers
Location
Kallithea, Chalkidiki
ISBN
978-1-7281-2861-0
Book
22nd Euromicro Conference on Digital System Design
Pages from
335
Pages to
342
Pages count
8
BibTex
@inproceedings{BUT159966, author="Adam {Crha} and Václav {Šimek} and Richard {Růžička}", title="PAIG Rewriting: The Way to Scalable Multifunctional Digital Circuits Synthesis", booktitle="22nd Euromicro Conference on Digital System Design", year="2019", pages="335--342", publisher="Institute of Electrical and Electronics Engineers", address="Kallithea, Chalkidiki", doi="10.1109/DSD.2019.00056", isbn="978-1-7281-2861-0" }