Publication detail

Efficient Acceleration of Decision Tree Algorithms for Encrypted Network Traffic Analysis

KOŘENEK, J. VRÁNA, R.

Original Title

Efficient Acceleration of Decision Tree Algorithms for Encrypted Network Traffic Analysis

Type

conference paper

Language

English

Original Abstract

Network traffic analysis and deep packet inspection are time-consuming tasks, which current processors can not handle at 100 Gbps speed. Therefore security systems need fast packet processing with hardware acceleration. With the growing of encrypted network traffic, it is necessary to extend Intrusion Detection Systems (IDSes) and other security tools by new detection methods. Security tools started to use classifiers trained by machine learning techniques based on decision trees. Random Forest, Compact Random Forest and AdaBoost provide excellent result in network traffic analysis. Unfortunately, hardware architectures for these machine learning techniques need high utilisation of on-chip memory and logic resources. Therefore we propose several optimisations of highly pipelined architecture for acceleration of machine learning techniques based on decision trees. The optimisations use the various encoding of a feature vector to reduce hardware resources. Due to the proposed optimisations, it was possible to reduce LUTs by 70.5 % for HTTP brute force attack detection and BRAMs by 50 % for application protocol identification. Both with only negligible impact on classifiers' accuracy. Moreover, proposed optimisations reduce wires and multiplexors in the processing pipeline, positively affecting the proposed architecture's maximal achievable frequency.

Keywords

acceleration, network, threat, detection, decision, tree

Authors

KOŘENEK, J.; VRÁNA, R.

Released

7. 4. 2021

Publisher

Institute of Electrical and Electronics Engineers

Location

Vídeň

ISBN

978-1-6654-3595-6

Book

Proceedings - 2021 24th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2021

Edition

IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems

Pages from

115

Pages to

118

Pages count

4

URL

https://www.fit.vut.cz/research/publication/12439/

BibTex

@inproceedings{BUT168508,
  author="Jan {Kořenek} and Roman {Vrána}",
  title="Efficient Acceleration of Decision Tree Algorithms for Encrypted Network Traffic Analysis",
  booktitle="Proceedings - 2021 24th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2021",
  year="2021",
  series="IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems",
  pages="115--118",
  publisher="Institute of Electrical and Electronics Engineers",
  address="Vídeň",
  doi="10.1109/DDECS52668.2021.9417068",
  isbn="978-1-6654-3595-6",
  url="https://www.fit.vut.cz/research/publication/12439/"
}