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Publication detail
SEKANINA, L.
Original Title
Design and Analysis of a New Self-Testing Adder Which Utilizes Polymorphic Gates
Type
conference paper
Language
English
Original Abstract
TBD
Keywords
digital circuit, polymorphic gate, adder, testing
Authors
RIV year
2007
Released
19. 4. 2007
Publisher
IEEE Computer Society
Location
Gliwice
ISBN
1424411610
Book
2007 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems
Pages from
243
Pages to
246
Pages count
4
BibTex
@inproceedings{BUT28586, author="Lukáš {Sekanina}", title="Design and Analysis of a New Self-Testing Adder Which Utilizes Polymorphic Gates", booktitle="2007 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems", year="2007", pages="243--246", publisher="IEEE Computer Society", address="Gliwice", isbn="1424411610" }