Přístupnostní navigace
E-application
Search Search Close
Publication detail
PUŠ, V. KOŘENEK, J.
Original Title
Fast and scalable packet classification using perfect hash functions
Type
article in a collection out of WoS and Scopus
Language
English
Original Abstract
Packet classification is an important operation for applications such as routers, firewalls or intrusion detection systems. Many algorithms and hardware architectures for packet classification have been created, but none of them can compete with the speed of TCAMs in the worst case. We propose new hardware-based algorithm for packet classification. The solution is based on problem decomposition and is aimed at the highest network speeds. A unique property of the algorithm is the constant time complexity in terms of external memory accesses. The algorithm performs exactly two external memory accesses to classify a packet. Using FPGA and one commodity SRAM chip, a throughput of 150 million packets per second can be achieved. This makes throughput of 100 Gbps for the shortest packets. Further performance scaling is possible with more or faster SRAM chips.
Keywords
classification, FPGA, perfect hash function
Authors
PUŠ, V.; KOŘENEK, J.
RIV year
2009
Released
28. 5. 2009
Publisher
Association for Computing Machinery
Location
New York
ISBN
978-1-60558-410-2
Book
Proceeding of the ACM/SIGDA international symposium on Field programmable gate arrays
Edition
Pages from
229
Pages to
236
Pages count
8
URL
https://www.fit.vut.cz/research/publication/8952/
BibTex
@inproceedings{BUT33726, author="Viktor {Puš} and Jan {Kořenek}", title="Fast and scalable packet classification using perfect hash functions", booktitle="Proceeding of the ACM/SIGDA international symposium on Field programmable gate arrays", year="2009", series="Association for Computing Machinery", pages="229--236", publisher="Association for Computing Machinery", address="New York", isbn="978-1-60558-410-2", url="https://www.fit.vut.cz/research/publication/8952/" }