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PŘIKRYL, Z. KŘOUSTEK, J. HRUŠKA, T. KOLÁŘ, D.
Original Title
Fast Just-In-Time Translated Simulator for ASIP Design
Type
conference paper
Language
English
Original Abstract
The fast and accurate processor simulator is an essential tool for effective design of modern high-performance application-specific instruction set processors. The nowadays trend of ASIP design is focused on automatic simulator generation based on a processor description in an architecture description language. The simulator is used for testing and validation of designed processor or target application. Furthermore, the simulator can produce the profiling information. This information can aid design space exploration and the processor and target application optimization. In this paper, we present the concept of automatically generated just-in-time translated simulator with the profiling capabilities. This simulator is very fast, and it is generated in a short time. It can be even used for simulation of special applications, such as applications with self-modifying code or applications for systems with external memories. The experimental results can be found at the end of the paper.
Keywords
Architecture description languages, simulation, testing, application-specific instruction set processors
Authors
PŘIKRYL, Z.; KŘOUSTEK, J.; HRUŠKA, T.; KOLÁŘ, D.
RIV year
2011
Released
12. 4. 2011
Publisher
IEEE Computer Society
Location
Cottbus
ISBN
978-1-4244-9753-9
Book
14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems
Pages from
279
Pages to
282
Pages count
4
BibTex
@inproceedings{BUT76314, author="Zdeněk {Přikryl} and Jakub {Křoustek} and Tomáš {Hruška} and Dušan {Kolář}", title="Fast Just-In-Time Translated Simulator for ASIP Design", booktitle="14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems", year="2011", pages="279--282", publisher="IEEE Computer Society", address="Cottbus", doi="10.1109/DDECS.2011.5783094", isbn="978-1-4244-9753-9" }